From patchwork Wed Nov 1 00:21:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10035797 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EFB32600C5 for ; Wed, 1 Nov 2017 00:21:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D89F028984 for ; Wed, 1 Nov 2017 00:21:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CD45528B41; Wed, 1 Nov 2017 00:21:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 62E9128984 for ; Wed, 1 Nov 2017 00:21:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751909AbdKAAV5 (ORCPT ); Tue, 31 Oct 2017 20:21:57 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:47035 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750764AbdKAAV4 (ORCPT ); Tue, 31 Oct 2017 20:21:56 -0400 Received: by mail-wm0-f68.google.com with SMTP id m72so1983394wmc.1 for ; Tue, 31 Oct 2017 17:21:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=IMNPXG8CwGtLUJ5/FFPwK9cRPzssWMQLqx0xSn8GKU0=; b=j/z127+c6fBk6w9Sp00FB7b3flgpCeT4udg0onI4x8LJLZGkQQ72PqLy5gdYWSmf4l wqUkc2mbBXRuFGrA1H+LEPYcPDr9alZXfnF8sb+uSelCIn1YggrujSFaZpjl/tctwlLq BR15XBaWzSFQjt0UD5B3iFPmIO/xmvyuU2O/E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=IMNPXG8CwGtLUJ5/FFPwK9cRPzssWMQLqx0xSn8GKU0=; b=TRuEE9DcS0W+YVo8YvMbhnI34Sc4R8kqPQaZW6n8BQkj183xKdWWlhoJaWWsMoLCOE U5Zkm0An0TrD0okAjuqiat2NvfmcjX+W4O0r1/McabX+xjF/VgsYYrT7PB+rr5aTzlm2 Ld1AeeAoB6vNkJ+9LvrJIRCbVeRfekDIaZOKBefdnAjlUBNQrXKV28PZhTorcClFgSgT vLL0Hf+64E0NOcYhZ3exGHxFub/CsnxoJf0TfNA13FtduTlFy/FQnIcq94r8Rxc4Yn52 YgLiqy/Il9tSUgZaBAPZ2L2vOvEXdDI8SrrVFqFm2jcZS9O/PAiXYqB38JOvPu7KS2Hx Iv8w== X-Gm-Message-State: AMCzsaVNKVDYjohL835XxqqywFItHeqhQtq0cfSNTNgm/BxHmyjptDC5 ZxaIq8qLc69QbgJVtlzddRp/bQ== X-Google-Smtp-Source: ABhQp+Rst8UnOHdX7BTryX7OP5ltxgOAEBcbAx77fwx2AmHViP+tay/rbV0HcqL1xDw/iV13vUrmxA== X-Received: by 10.28.21.10 with SMTP id 10mr494103wmv.41.1509495715338; Tue, 31 Oct 2017 17:21:55 -0700 (PDT) Received: from localhost.localdomain ([105.129.222.2]) by smtp.gmail.com with ESMTPSA id k30sm5897732wrf.52.2017.10.31.17.21.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Oct 2017 17:21:54 -0700 (PDT) From: Ard Biesheuvel To: ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, adrian.hunter@intel.com, linux-mmc@vger.kernel.org Cc: devicetree@vger.kernel.org, Ard Biesheuvel Subject: [PATCH] sdhci-fujitsu: add support for setting the CMD_DAT_DELAY attribute Date: Wed, 1 Nov 2017 00:21:32 +0000 Message-Id: <20171101002132.13500-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Socionext SynQuacer SoC inherits this IP from Fujitsu, but requires the F_SDH30_CMD_DAT_DELAY bit to be set in the F_SDH30_ESD_CONTROL control register. So let's add an optional property to this device's binding, and set the attribute if it is present in the DT node. Signed-off-by: Ard Biesheuvel --- Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt | 2 ++ drivers/mmc/host/sdhci_f_sdh30.c | 18 +++++++++++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt b/Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt index de2c53cff4f1..9ad02f743ad0 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt @@ -15,6 +15,8 @@ Required properties: Optional properties: - vqmmc-supply: phandle to the regulator device tree node, mentioned as the VCCQ/VDD_IO supply in the eMMC/SD specs. +- cmd-dat-delay-select: boolean property indicating that this host requires + the CMD_DAT_DELAY control to be enabled. Example: diff --git a/drivers/mmc/host/sdhci_f_sdh30.c b/drivers/mmc/host/sdhci_f_sdh30.c index 111b66f5439b..00bc2121d607 100644 --- a/drivers/mmc/host/sdhci_f_sdh30.c +++ b/drivers/mmc/host/sdhci_f_sdh30.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "sdhci-pltfm.h" @@ -45,8 +46,9 @@ struct f_sdhost_priv { struct clk *clk_iface; struct clk *clk; - u32 vendor_hs200; struct device *dev; + u32 vendor_hs200; + bool enable_cmd_dat_delay; }; static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host) @@ -84,10 +86,19 @@ static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host) static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask) { + struct f_sdhost_priv *priv = sdhci_priv(host); + u32 ctl; + if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); sdhci_reset(host, mask); + + if (priv->enable_cmd_dat_delay) { + ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL); + ctl |= F_SDH30_CMD_DAT_DELAY; + sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); + } } static const struct sdhci_ops sdhci_f_sdh30_ops = { @@ -126,6 +137,11 @@ static int sdhci_f_sdh30_probe(struct platform_device *pdev) host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE | SDHCI_QUIRK2_TUNING_WORK_AROUND; + if (device_property_read_bool(dev, "cmd-dat-delay-select")) { + dev_info(dev, "Setting cmd-dat-delay\n"); + priv->enable_cmd_dat_delay = true; + } + ret = mmc_of_parse(host->mmc); if (ret) goto err;