From patchwork Wed Jan 10 15:32:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 10155301 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6FD3160231 for ; Wed, 10 Jan 2018 15:33:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6164420415 for ; Wed, 10 Jan 2018 15:33:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 556D328332; Wed, 10 Jan 2018 15:33:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E8EAB20415 for ; Wed, 10 Jan 2018 15:32:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965490AbeAJPc4 (ORCPT ); Wed, 10 Jan 2018 10:32:56 -0500 Received: from mga06.intel.com ([134.134.136.31]:22148 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965097AbeAJPcy (ORCPT ); Wed, 10 Jan 2018 10:32:54 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Jan 2018 07:32:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,340,1511856000"; d="scan'208";a="19004746" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga003.jf.intel.com with ESMTP; 10 Jan 2018 07:32:52 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 3BD9D3AD; Wed, 10 Jan 2018 17:32:50 +0200 (EET) From: Andy Shevchenko To: Adrian Hunter , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3] sdhci: Advertise 2.0v supply on SDIO host interface Date: Wed, 10 Jan 2018 17:32:50 +0200 Message-Id: <20180110153250.13094-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.15.1 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Intel Edison the Broadcom WiFi card, which is connected to SDIO, requires 2.0v, while the host, according to Intel Merrifield TRM, supports 1.8v supply only. The card announces itself as mmc2: new ultra high speed DDR50 SDIO card at address 0001 Introduce a custom OCR mask and ->set_power() callback to override 2.0v supply on Intel Merrifield platforms by enforcing 1.8v power choice. Signed-off-by: Andy Shevchenko --- - address comments given by Adrian drivers/mmc/host/sdhci-pci-core.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c index 3e4f04fd5175..24c2b2504b3f 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -778,6 +778,8 @@ static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot) slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; break; case INTEL_MRFLD_SDIO: + /* Advertise 2.0v for compatibility with the SDIO card's OCR */ + slot->host->ocr_mask = MMC_VDD_20_21 | MMC_VDD_165_195; slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD; break; @@ -789,10 +791,35 @@ static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot) return 0; } +static void intel_mrfld_sdhci_set_power(struct sdhci_host *host, + unsigned char mode, unsigned short vdd) +{ + /* + * Without a regulator, SDHCI does not support 2.0v but we get + * here because we advertised 2.0v support for compatibility + * with the SDIO card's OCR. Map it to 1.8v for the purpose of + * turning on the power. + */ + if (IS_ERR(host->mmc->supply.vmmc) && vdd == ilog2(MMC_VDD_20_21)) + vdd = ilog2(MMC_VDD_165_195); + + sdhci_set_power(host, mode, vdd); +} + +static const struct sdhci_ops intel_mrfld_sdhci_pci_ops = { + .set_clock = sdhci_set_clock, + .set_power = intel_mrfld_sdhci_set_power, + .enable_dma = sdhci_pci_enable_dma, + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, +}; + static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = { .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 | SDHCI_QUIRK2_PRESET_VALUE_BROKEN, + .ops = &intel_mrfld_sdhci_pci_ops, .allow_runtime_pm = true, .probe_slot = intel_mrfld_mmc_probe_slot, };