From patchwork Fri Apr 6 22:07:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Kurtz X-Patchwork-Id: 10327627 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 737036038F for ; Fri, 6 Apr 2018 22:08:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 55714294DC for ; Fri, 6 Apr 2018 22:08:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4A2512955B; Fri, 6 Apr 2018 22:08:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 23E6C294DC for ; Fri, 6 Apr 2018 22:08:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751944AbeDFWIR (ORCPT ); Fri, 6 Apr 2018 18:08:17 -0400 Received: from mail-io0-f196.google.com ([209.85.223.196]:38586 "EHLO mail-io0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751711AbeDFWIR (ORCPT ); Fri, 6 Apr 2018 18:08:17 -0400 Received: by mail-io0-f196.google.com with SMTP id b20so3364545iof.5 for ; Fri, 06 Apr 2018 15:08:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=llkuil9K/3lJy5n97iB2887kpm8tX5qIY5PF8pi7XjI=; b=PUFsIziRDvHvxHbdarH0E+n5zSsQ7z3hQgaYmwdWuJcv22RGcq82YYe0qCyiXuZp5a C52zoE2Y8/q1dCCCRi1yZt9DCTtIyfbYQe3g/1qw6lLl8e99zMZrr4wAFiP6+0wmPYDy A77qLL2WHg9HDD2LwyC6gfTTHqkRUpPtGyLJQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=llkuil9K/3lJy5n97iB2887kpm8tX5qIY5PF8pi7XjI=; b=f21Ay6fGQtadNaf6wkvY2m/BMjbdg5Gy6IvCVF0eaHLqM7sOxsHLW0EEyh4tlD+RPH /tRdUxGrw5KsobwaygUP54Iovo2HaaaNTKKJfXeMBLZ0UQGNXU/ubyznvc680tldmvS7 a9mIUuXi2jWZobd2CliwErpGhHNpNPpKN+OZVcex95qNvsu/ZsonfiEXpLOn4H0E0z40 LeIvnoV02YtD0jUMP/FTk6eHOvj9+5O0d+7Q5XNIea8/BRfRwnYBs8lnCJTK4BEPw073 6bSQoA7e/WxR3G3Vd1DPnmfuBA5mQjysmIV8V3MDb3F4vhDuYpfRahqxdqICXPvqT7M/ llCQ== X-Gm-Message-State: ALQs6tA4J6ZU3Cf2YAk3bNgxAmHZ07Rid8XMmsa0QIUS9JQCNsFhTlJu v+26/HCucprYyxnD43jBVR8DEw== X-Google-Smtp-Source: AIpwx48ITENKH2x4TwWhonxdgC6yM3vBTtORtHnrPEazBoSzpFJyJLeGVggTnbZTir+YkmtjRuVVLg== X-Received: by 10.107.131.207 with SMTP id n76mr25854783ioi.158.1523052496477; Fri, 06 Apr 2018 15:08:16 -0700 (PDT) Received: from djkurtz2.bld.corp.google.com ([2620:15c:183:0:1cfd:61a5:7215:5f9c]) by smtp.gmail.com with ESMTPSA id w71sm7467650iow.87.2018.04.06.15.08.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 Apr 2018 15:08:15 -0700 (PDT) From: Daniel Kurtz Cc: satyajit.sahu@amd.com, ssundark@amd.com, craigb@chromium.org, Daniel Kurtz , Adrian Hunter , Ulf Hansson , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org (open list) Subject: [PATCH] mmc: sdhci-pci: Only do AMD tuning for HS200 Date: Fri, 6 Apr 2018 16:07:59 -0600 Message-Id: <20180406220806.150534-1-djkurtz@chromium.org> X-Mailer: git-send-email 2.17.0.484.g0c8726318c-goog To: unlisted-recipients:; (no To-header on input) Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Commit c31165d7400b ("mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1") added a HS200 tuning method for use with AMD SDHCI controllers. As described in the commit subject, this tuning is specific for HS200. However, as implemented, this method is used for all host timings, because platform_execute_tuning, if it exists, is called unconditionally by sdhci_execute_tuning(). This breaks tuning when using the AMD controller with, for example, a DDR50 SD card. Instead, we can implement an amd execute_tuning wrapper callback, and then conditionally do the HS200 specific tuning for HS200, and otherwise call back to the standard sdhci_execute_tuning(). Signed-off-by: Daniel Kurtz Acked-by: Shyam Sundar S K Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pci-core.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c index 787434e5589d..78c25ad35fd2 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -1312,7 +1312,7 @@ static void amd_enable_manual_tuning(struct pci_dev *pdev) pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val); } -static int amd_execute_tuning(struct sdhci_host *host, u32 opcode) +static int amd_execute_tuning_hs200(struct sdhci_host *host, u32 opcode) { struct sdhci_pci_slot *slot = sdhci_priv(host); struct pci_dev *pdev = slot->chip->pdev; @@ -1351,6 +1351,27 @@ static int amd_execute_tuning(struct sdhci_host *host, u32 opcode) return 0; } +static int amd_execute_tuning(struct mmc_host *mmc, u32 opcode) +{ + struct sdhci_host *host = mmc_priv(mmc); + + /* AMD requires custom HS200 tuning */ + if (host->timing == MMC_TIMING_MMC_HS200) + return amd_execute_tuning_hs200(host, opcode); + + /* Otherwise perform standard SDHCI tuning */ + return sdhci_execute_tuning(mmc, opcode); +} + +static int amd_probe_slot(struct sdhci_pci_slot *slot) +{ + struct mmc_host_ops *ops = &slot->host->mmc_host_ops; + + ops->execute_tuning = amd_execute_tuning; + + return 0; +} + static int amd_probe(struct sdhci_pci_chip *chip) { struct pci_dev *smbus_dev; @@ -1385,12 +1406,12 @@ static const struct sdhci_ops amd_sdhci_pci_ops = { .set_bus_width = sdhci_set_bus_width, .reset = sdhci_reset, .set_uhs_signaling = sdhci_set_uhs_signaling, - .platform_execute_tuning = amd_execute_tuning, }; static const struct sdhci_pci_fixes sdhci_amd = { .probe = amd_probe, .ops = &amd_sdhci_pci_ops, + .probe_slot = amd_probe_slot, }; static const struct pci_device_id pci_ids[] = {