From patchwork Wed Oct 31 23:05:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Niklas_S=C3=B6derlund?= X-Patchwork-Id: 10663367 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8061513A4 for ; Wed, 31 Oct 2018 23:51:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6B71C2BB80 for ; Wed, 31 Oct 2018 23:51:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5FAA52BB94; Wed, 31 Oct 2018 23:51:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 13C2D2BB80 for ; Wed, 31 Oct 2018 23:51:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728238AbeKAIwO (ORCPT ); Thu, 1 Nov 2018 04:52:14 -0400 Received: from bin-mail-out-05.binero.net ([195.74.38.228]:27070 "EHLO bin-mail-out-05.binero.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728005AbeKAIG1 (ORCPT ); Thu, 1 Nov 2018 04:06:27 -0400 X-Halon-ID: 90d382b7-dd61-11e8-911a-0050569116f7 Authorized-sender: niklas@soderlund.pp.se Received: from bismarck.berto.se (unknown [89.233.230.99]) by bin-vsp-out-03.atm.binero.net (Halon) with ESMTPA id 90d382b7-dd61-11e8-911a-0050569116f7; Thu, 01 Nov 2018 00:06:15 +0100 (CET) From: =?utf-8?q?Niklas_S=C3=B6derlund?= To: Wolfram Sang , Masahiro Yamada , Ulf Hansson , linux-mmc@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, =?utf-8?q?Niklas_S=C3=B6derlund?= Subject: [PATCH v3 3/3] mmc: renesas_sdhi: add initial setting of interrupt mask register Date: Thu, 1 Nov 2018 00:05:54 +0100 Message-Id: <20181031230554.1660-4-niklas.soderlund@ragnatech.se> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181031230554.1660-1-niklas.soderlund@ragnatech.se> References: <20181031230554.1660-1-niklas.soderlund@ragnatech.se> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Niklas Söderlund The initial value of the interrupt mask register may be different from the H/W manual at the startup of the kernel by setting from the bootloader. Since the error interrupts may be unmasked, the driver sets initial value. The initial value is only known for R-Car Gen2 and Gen3 platforms so limit the initialization to those platforms. Based on work from Masaharu Hayakawa. Signed-off-by: Niklas Söderlund Reviewed-by: Wolfram Sang Reviewed-by: Simon Horman --- * Changes since v1 - Limit the initialization to Gen2+ platforms by checking the TMIO_MMC_MIN_RCAR2 flag. - Rename the constant for the initialization value to reflect it's only for R-Car Gen2+ platforms. - Move setting of the initial mask to renesas_sdhi. --- drivers/mmc/host/renesas_sdhi_core.c | 4 ++++ drivers/mmc/host/tmio_mmc.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index d3ac43c3d0b655dc..f2162f2b7de3ae05 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -532,6 +532,10 @@ static void renesas_sdhi_hw_reset(struct tmio_mmc_host *host) sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL, ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN & sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); + + if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) + sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, + TMIO_MASK_INIT_RCAR2); } static int renesas_sdhi_wait_idle(struct tmio_mmc_host *host, u32 bit) diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index 1e317027bf534612..5f6dfb86e43e8208 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -96,6 +96,7 @@ /* Define some IRQ masks */ /* This is the mask used at reset by the chip */ +#define TMIO_MASK_INIT_RCAR2 0x8b7f031d /* Initial value for R-Car Gen2+ */ #define TMIO_MASK_ALL 0x837f031d #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)