From patchwork Fri Apr 5 08:34:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Merello X-Patchwork-Id: 10886997 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 61E0D17E9 for ; Fri, 5 Apr 2019 08:35:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 488B028737 for ; Fri, 5 Apr 2019 08:35:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3B69028B03; Fri, 5 Apr 2019 08:35:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AFB1B28AFF for ; Fri, 5 Apr 2019 08:35:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730024AbfDEIfp (ORCPT ); Fri, 5 Apr 2019 04:35:45 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:39610 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729792AbfDEIfo (ORCPT ); Fri, 5 Apr 2019 04:35:44 -0400 Received: by mail-wr1-f65.google.com with SMTP id j9so6935663wrn.6 for ; Fri, 05 Apr 2019 01:35:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:reply-to; bh=ha0IGnH2g36tKO3pMwcmsNkEj2iOsIUjymp6BwQgljA=; b=PInhFcpWYQOn4iQYZZ0FwsR9uPi0YyggqHAUB24umD/2urhbcAgJKFzuMSuevwtrvd aLBf287cHDTALBFSgcz35TGYRkyJzQZoRazXwB61gxAM6Kr2l2S2VdsOZH8Du73g/WVf u/V/AqUElUF+WJsVRjjudpMj6/e4F97j6qKzh3Zv68dMUmPj7zLmn9UspZhfnuDJ3TWh jozOsBwdLEb482KMeT+67EIv3A4ijW735ikNMJlYeuOQQwD/dkTjCp1ni8n8e8MwMrhc pwKVGO+EOOECVzutc0CVBLyatWN40oNJs6JK/YpTDluZXAST2TcMLM/KY66JIfPQ7YIq OM6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ha0IGnH2g36tKO3pMwcmsNkEj2iOsIUjymp6BwQgljA=; b=RT6psWaU3CDGqFDNIJKaER3wJjkzqo2aKkdidQ7mTdzY0wcW9nn9SZ7IwW/eYsk9o6 guRTg7+YlLdwMM+c9StC2rLaw1CRvtOhvKex5nls7xo4Ibo0n+P+xNYHXJ+dVxIHxjrL jPVwaYhu+Zd7g+1bGHYs5exrB2eAcUk6Sc+mO7Hjk9gCh4zJuKpJjuW6sBvR4Oq/FnS0 pDCphFYRT0EVsFKol5TwAtNymqP3rgudzM6+zXTPWmWZbfOrtLeynjmkhkTxzl4nvPTo Y1OOT96CdujrbrUfFl7k1KjkJ0WHEHItXLsaK9ZyxJ+VwZ05upIQReZxv1Pl+LmI2yAv OJGw== X-Gm-Message-State: APjAAAUjLzqaF41I57uRcepwVqehjGs19QgqMydHGZRtMNfWOGBBKjNC GL9lxfeJhtEykf3xwJv8IC8= X-Google-Smtp-Source: APXvYqzJ6xeFlFx8OSaIYbb8lj4pArU7L8E8mORJta5PVixLHB2KzZYEU+cPqdENRKvUoc0Ok0ztRQ== X-Received: by 2002:adf:ff91:: with SMTP id j17mr7807312wrr.114.1554453342949; Fri, 05 Apr 2019 01:35:42 -0700 (PDT) Received: from NewMoon.iit.local ([90.147.180.254]) by smtp.gmail.com with ESMTPSA id d14sm33501735wro.79.2019.04.05.01.35.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 05 Apr 2019 01:35:41 -0700 (PDT) From: Andrea Merello To: ulf.hansson@linaro.org, m.szyprowski@samsung.com Cc: linux-mmc@vger.kernel.org, Andrea Merello Subject: [PATCH] mmc: core: make pwrseq_emmc (partially) support sleepy GPIO controllers Date: Fri, 5 Apr 2019 10:34:58 +0200 Message-Id: <20190405083458.16871-1-andrea.merello@gmail.com> X-Mailer: git-send-email 2.17.1 Reply-To: 93b87974-a4f1-1375-425d-5eed2c6a96c7@samsung.com Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP pwrseq_emmc.c implements a HW reset procedure for eMMC chip by driving a GPIO line. It registers the .reset() cb on mmc_pwrseq_ops and it registers a system restart notification handler; both of them perform reset by unconditionally calling gpiod_set_value(). If the eMMC reset line is tied to a GPIO controller whose driver can sleep (i.e. I2C GPIO controller), then the kernel would spit warnings when trying to reset the eMMC chip by means of .reset() mmc_pwrseq_ops cb (that is exactly what I'm seeing during boot). Furthermore, on system reset we would gets to the system restart notification handler with disabled interrupts - local_irq_disable() is called in machine_restart() at least on ARM/ARM64 - and we would be in trouble when the GPIO driver tries to sleep (which indeed doesn't happen here, likely because in my case the machine specific code doesn't call do_kernel_restart(), I guess..). This patch fixes the .reset() cb to make use of gpiod_set_value_cansleep(), so that the eMMC gets reset on boot without complaints, while, since there isn't that much we can do, we avoid register the restart handler if the GPIO controller has a sleepy driver (and we spit a dev_notice() message to let people know).. This had been tested on a downstream 4.9 kernel with backported commit 83f37ee7ba33 ("mmc: pwrseq: Add reset callback to the struct mmc_pwrseq_ops") and commit ae60fb031cf2 ("mmc: core: Don't do eMMC HW reset when resuming the eMMC card"), because I couldn't boot my board otherwise. Maybe worth to RFT. Signed-off-by: Andrea Merello diff --git a/drivers/mmc/core/pwrseq_emmc.c b/drivers/mmc/core/pwrseq_emmc.c index efb8a7965dd4..154f4204d58c 100644 --- a/drivers/mmc/core/pwrseq_emmc.c +++ b/drivers/mmc/core/pwrseq_emmc.c @@ -30,19 +30,14 @@ struct mmc_pwrseq_emmc { #define to_pwrseq_emmc(p) container_of(p, struct mmc_pwrseq_emmc, pwrseq) -static void __mmc_pwrseq_emmc_reset(struct mmc_pwrseq_emmc *pwrseq) -{ - gpiod_set_value(pwrseq->reset_gpio, 1); - udelay(1); - gpiod_set_value(pwrseq->reset_gpio, 0); - udelay(200); -} - static void mmc_pwrseq_emmc_reset(struct mmc_host *host) { struct mmc_pwrseq_emmc *pwrseq = to_pwrseq_emmc(host->pwrseq); - __mmc_pwrseq_emmc_reset(pwrseq); + gpiod_set_value_cansleep(pwrseq->reset_gpio, 1); + udelay(1); + gpiod_set_value_cansleep(pwrseq->reset_gpio, 0); + udelay(200); } static int mmc_pwrseq_emmc_reset_nb(struct notifier_block *this, @@ -50,8 +45,11 @@ static int mmc_pwrseq_emmc_reset_nb(struct notifier_block *this, { struct mmc_pwrseq_emmc *pwrseq = container_of(this, struct mmc_pwrseq_emmc, reset_nb); + gpiod_set_value(pwrseq->reset_gpio, 1); + udelay(1); + gpiod_set_value(pwrseq->reset_gpio, 0); + udelay(200); - __mmc_pwrseq_emmc_reset(pwrseq); return NOTIFY_DONE; } @@ -72,14 +70,18 @@ static int mmc_pwrseq_emmc_probe(struct platform_device *pdev) if (IS_ERR(pwrseq->reset_gpio)) return PTR_ERR(pwrseq->reset_gpio); - /* - * register reset handler to ensure emmc reset also from - * emergency_reboot(), priority 255 is the highest priority - * so it will be executed before any system reboot handler. - */ - pwrseq->reset_nb.notifier_call = mmc_pwrseq_emmc_reset_nb; - pwrseq->reset_nb.priority = 255; - register_restart_handler(&pwrseq->reset_nb); + if (!gpiod_cansleep(pwrseq->reset_gpio)) { + /* + * register reset handler to ensure emmc reset also from + * emergency_reboot(), priority 255 is the highest priority + * so it will be executed before any system reboot handler. + */ + pwrseq->reset_nb.notifier_call = mmc_pwrseq_emmc_reset_nb; + pwrseq->reset_nb.priority = 255; + register_restart_handler(&pwrseq->reset_nb); + } else { + dev_notice(dev, "EMMC reset pin tied to a sleepy GPIO driver; reset on emergency-reboot disabled\n"); + } pwrseq->pwrseq.ops = &mmc_pwrseq_emmc_ops; pwrseq->pwrseq.dev = dev;