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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id g10sm10795091wrq.2.2019.05.13.02.15.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 13 May 2019 02:15:58 -0700 (PDT) From: Neil Armstrong To: ulf.hansson@linaro.org, khilman@baylibre.com, devicetree@vger.kernel.org Cc: baylibre-upstreaming@groups.io, Neil Armstrong , linux-mmc@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: mmc: meson-gx: add ddr-access-quirk property Date: Mon, 13 May 2019 11:15:46 +0200 Message-Id: <20190513091548.16674-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190513091548.16674-1-narmstrong@baylibre.com> References: <20190513091548.16674-1-narmstrong@baylibre.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On the Amlogic G12A SoC family, (only) the SDIO controller has a bug which makes any DDR access from the MMC controller fail. Add the amlogic,ddr-access-quirk property so signal this particular controller has this bug and needs a quirk to work properly. Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl --- Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt index 13e70409e8ac..f8914dab06c6 100644 --- a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt +++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt @@ -22,6 +22,10 @@ Required properties: clock rate requested by the MMC core. - resets : phandle of the internal reset line +Optional properties: +- amlogic,ddr-access-quirk: set when HW cannot access the DDR memory, like on + the G12A SDIO controller. + Example: sd_emmc_a: mmc@70000 {