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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id g10sm10795091wrq.2.2019.05.13.02.16.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 13 May 2019 02:16:01 -0700 (PDT) From: Neil Armstrong To: ulf.hansson@linaro.org, khilman@baylibre.com Cc: baylibre-upstreaming@groups.io, Neil Armstrong , linux-mmc@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: meson-g12a: add ddr-access-quirk property to SDIO controller Date: Mon, 13 May 2019 11:15:48 +0200 Message-Id: <20190513091548.16674-4-narmstrong@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190513091548.16674-1-narmstrong@baylibre.com> References: <20190513091548.16674-1-narmstrong@baylibre.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Amlogic G12A SDIO Controller has a bug preventing direct DDR access, mark this specific controller with the amlogic,ddr-access-quirk property. Signed-off-by: Neil Armstrong Acked-by: Martin Blumenstingl --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 + 1 file changed, 1 insertion(+) Kevin, the MMC node hasn't been sent yet, when the quirk bindings is accepted, we will directly send the MMC modes with this property. Nei diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index 5cbfca00f5cf..d8b3441f0c45 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -1061,6 +1061,7 @@ <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; + amlogic,ddr-access-quirk; }; sd_emmc_b: sd@ffe05000 {