| Message ID | 20200224231841.26550-2-digetx@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce NVIDIA Tegra Partition Table | expand |
Hi, > > > In order to support parsing of NVIDIA Tegra Partition Table format, we > need to know the BOOT_SIZE_MULT value of the Extended CSD register > because > NVIDIA's bootloader linearizes the boot0/boot1/main partitions into a > single virtual space, and thus, all partition addresses are shifted by > the size of boot0 + boot1 partitions. > > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > drivers/mmc/core/mmc.c | 2 ++ > include/linux/mmc/card.h | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c > index f6912ded652d..88e5b4224d3c 100644 > --- a/drivers/mmc/core/mmc.c > +++ b/drivers/mmc/core/mmc.c > @@ -417,6 +417,8 @@ static int mmc_decode_ext_csd(struct mmc_card > *card, u8 *ext_csd) > ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]; > card->ext_csd.raw_hc_erase_grp_size = > ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; > + card->ext_csd.raw_boot_mult = > + ext_csd[EXT_CSD_BOOT_MULT]; You might want at this point multiply it by 128K, And get rid of: part_size = ext_csd[EXT_CSD_BOOT_MULT] << 17; Below... Thanks, Avri
01.03.2020 13:50, Avri Altman пишет: > Hi, >> >> >> In order to support parsing of NVIDIA Tegra Partition Table format, we >> need to know the BOOT_SIZE_MULT value of the Extended CSD register >> because >> NVIDIA's bootloader linearizes the boot0/boot1/main partitions into a >> single virtual space, and thus, all partition addresses are shifted by >> the size of boot0 + boot1 partitions. >> >> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> >> --- >> drivers/mmc/core/mmc.c | 2 ++ >> include/linux/mmc/card.h | 1 + >> 2 files changed, 3 insertions(+) >> >> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c >> index f6912ded652d..88e5b4224d3c 100644 >> --- a/drivers/mmc/core/mmc.c >> +++ b/drivers/mmc/core/mmc.c >> @@ -417,6 +417,8 @@ static int mmc_decode_ext_csd(struct mmc_card >> *card, u8 *ext_csd) >> ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]; >> card->ext_csd.raw_hc_erase_grp_size = >> ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; >> + card->ext_csd.raw_boot_mult = >> + ext_csd[EXT_CSD_BOOT_MULT]; > You might want at this point multiply it by 128K, > And get rid of: part_size = ext_csd[EXT_CSD_BOOT_MULT] << 17; > Below... But it's not a *raw* _boot_mult anymore then. I'm not sure that it will be a worthwhile change.
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index f6912ded652d..88e5b4224d3c 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -417,6 +417,8 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd) ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]; card->ext_csd.raw_hc_erase_grp_size = ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; + card->ext_csd.raw_boot_mult = + ext_csd[EXT_CSD_BOOT_MULT]; if (card->ext_csd.rev >= 3) { u8 sa_shift = ext_csd[EXT_CSD_S_A_TIMEOUT]; card->ext_csd.part_config = ext_csd[EXT_CSD_PART_CONFIG]; diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index cf3780a6ccc4..90b1d83ce675 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -108,6 +108,7 @@ struct mmc_ext_csd { u8 raw_hc_erase_gap_size; /* 221 */ u8 raw_erase_timeout_mult; /* 223 */ u8 raw_hc_erase_grp_size; /* 224 */ + u8 raw_boot_mult; /* 226 */ u8 raw_sec_trim_mult; /* 229 */ u8 raw_sec_erase_mult; /* 230 */ u8 raw_sec_feature_support;/* 231 */
In order to support parsing of NVIDIA Tegra Partition Table format, we need to know the BOOT_SIZE_MULT value of the Extended CSD register because NVIDIA's bootloader linearizes the boot0/boot1/main partitions into a single virtual space, and thus, all partition addresses are shifted by the size of boot0 + boot1 partitions. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/mmc/core/mmc.c | 2 ++ include/linux/mmc/card.h | 1 + 2 files changed, 3 insertions(+)