From patchwork Fri Aug 14 01:43:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?V2VuYmluIE1laSAo5qKF5paH5b2sKQ==?= X-Patchwork-Id: 11713283 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D54FE722 for ; Fri, 14 Aug 2020 01:44:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BAAE020838 for ; Fri, 14 Aug 2020 01:44:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="FaXMGN/3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726684AbgHNBox (ORCPT ); Thu, 13 Aug 2020 21:44:53 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:58090 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726546AbgHNBow (ORCPT ); Thu, 13 Aug 2020 21:44:52 -0400 X-UUID: e1acfdc0286e42a6be40b2c1d651f5b8-20200814 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=UiYITuOicKAGf3efIhr1L/4MAUvnnb66uoIfzUsZtVU=; b=FaXMGN/3mu9mRGovc/79GkziTta5xdIK0GO1fg+tRTEEpx44eRGneQPqOmtiyqdcsd7yCUpTmR7097y3RKkS2XMxNAC8ikJrA7MQjkORMWi6IMYcRCxbx7J7apOygDVwSDAS8yyF+I6tOFhuxJGsADOELLoWqLbUJF2Pub3yorQ=; X-UUID: e1acfdc0286e42a6be40b2c1d651f5b8-20200814 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1305036608; Fri, 14 Aug 2020 09:44:48 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 14 Aug 2020 09:44:46 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 14 Aug 2020 09:44:45 +0800 From: Wenbin Mei To: Ulf Hansson , Rob Herring CC: Chaotian Jing , Matthias Brugger , Philipp Zabel , , , , , , , Wenbin Mei , Subject: [v5,1/3] mmc: dt-bindings: Add resets/reset-names for Mediatek MMC bindings Date: Fri, 14 Aug 2020 09:43:44 +0800 Message-ID: <20200814014346.6496-2-wenbin.mei@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200814014346.6496-1-wenbin.mei@mediatek.com> References: <20200814014346.6496-1-wenbin.mei@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add description for resets/reset-names. Cc: # v5.4+ Fixes: 966580ad236e ("mmc: mediatek: add support for MT7622 SoC") Signed-off-by: Wenbin Mei Tested-by: Frank Wunderlich --- Documentation/devicetree/bindings/mmc/mtk-sd.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt index 8a532f4453f2..09aecec47003 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt @@ -49,6 +49,8 @@ Optional properties: error caused by stop clock(fifo full) Valid range = [0:0x7]. if not present, default value is 0. applied to compatible "mediatek,mt2701-mmc". +- resets: Phandle and reset specifier pair to softreset line of MSDC IP. +- reset-names: Should be "hrst". Examples: mmc0: mmc@11230000 {