diff mbox series

[1/2] clk: Add clk_get_first_to_set_rate

Message ID 20210307170742.70949-2-paul@crapouillou.net (mailing list archive)
State New, archived
Headers show
Series mmc: jz4740: Support PLL frequency changes | expand

Commit Message

Paul Cercueil March 7, 2021, 5:07 p.m. UTC
The purpose of this function is to be used along with the notifier
mechanism.

When a parent clock can see its rate externally changed at any moment,
and a driver needs a specific clock rate to function, it can register a
notifier on the parent clock, and call clk_set_rate() on the base clock
to adjust its frequency according to the new parent clock.

This works fine, until the base clock has the CLK_SET_RATE_PARENT flag
set. In that case, calling clk_set_rate() on the base clock will call
clk_set_rate() on the parent clock, which will trigger the notifier
again, and we're in a loop.

For that reason, we need to register the notifier on the parent clock of
the first ancestor of the base clock that will effectively modify its
rate when clk_set_rate() is called, which we can now obtain with
clk_get_first_to_set_rate().

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 drivers/clk/clk.c   |  9 +++++++++
 include/linux/clk.h | 16 ++++++++++++++++
 2 files changed, 25 insertions(+)

Comments

Stephen Boyd March 13, 2021, 10:28 p.m. UTC | #1
Quoting Paul Cercueil (2021-03-07 09:07:41)
> The purpose of this function is to be used along with the notifier
> mechanism.
> 
> When a parent clock can see its rate externally changed at any moment,
> and a driver needs a specific clock rate to function, it can register a
> notifier on the parent clock, and call clk_set_rate() on the base clock
> to adjust its frequency according to the new parent clock.

Can the driver use the rate locking mechanism to get a certain rate
instead of registering for notifiers and trying to react to changes?

> 
> This works fine, until the base clock has the CLK_SET_RATE_PARENT flag
> set. In that case, calling clk_set_rate() on the base clock will call
> clk_set_rate() on the parent clock, which will trigger the notifier
> again, and we're in a loop.
> 
> For that reason, we need to register the notifier on the parent clock of
> the first ancestor of the base clock that will effectively modify its
> rate when clk_set_rate() is called, which we can now obtain with
> clk_get_first_to_set_rate().
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Paul Cercueil March 13, 2021, 11:09 p.m. UTC | #2
Hi Stephen,


Le sam. 13 mars 2021 à 14:28, Stephen Boyd <sboyd@kernel.org> a écrit 
:
> Quoting Paul Cercueil (2021-03-07 09:07:41)
>>  The purpose of this function is to be used along with the notifier
>>  mechanism.
>> 
>>  When a parent clock can see its rate externally changed at any 
>> moment,
>>  and a driver needs a specific clock rate to function, it can 
>> register a
>>  notifier on the parent clock, and call clk_set_rate() on the base 
>> clock
>>  to adjust its frequency according to the new parent clock.
> 
> Can the driver use the rate locking mechanism to get a certain rate
> instead of registering for notifiers and trying to react to changes?

You mean with clk_rate_exclusive_get()? That sounds like a good idea, 
but what would happen when a different driver calls the non-exclusive 
clk_set_rate() on this clock (or the parent), would it return -EBUSY, 
lock on a mutex? ...

Cheers,
-Paul

> 
>> 
>>  This works fine, until the base clock has the CLK_SET_RATE_PARENT 
>> flag
>>  set. In that case, calling clk_set_rate() on the base clock will 
>> call
>>  clk_set_rate() on the parent clock, which will trigger the notifier
>>  again, and we're in a loop.
>> 
>>  For that reason, we need to register the notifier on the parent 
>> clock of
>>  the first ancestor of the base clock that will effectively modify 
>> its
>>  rate when clk_set_rate() is called, which we can now obtain with
>>  clk_get_first_to_set_rate().
>> 
>>  Signed-off-by: Paul Cercueil <paul@crapouillou.net>
diff mbox series

Patch

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 5052541a0986..3fd75e283482 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -2450,6 +2450,15 @@  struct clk *clk_get_parent(struct clk *clk)
 }
 EXPORT_SYMBOL_GPL(clk_get_parent);
 
+struct clk *clk_get_first_to_set_rate(struct clk *clk)
+{
+	while (clk && (clk->core->flags & CLK_SET_RATE_PARENT))
+		clk = clk_get_parent(clk);
+
+	return clk;
+}
+
+
 static struct clk_core *__clk_init_parent(struct clk_core *core)
 {
 	u8 index = 0;
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 266e8de3cb51..f0ea6ac6aa39 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -766,6 +766,17 @@  struct clk *clk_get_parent(struct clk *clk);
  */
 struct clk *clk_get_sys(const char *dev_id, const char *con_id);
 
+/**
+ * clk_get_first_to_set_rate - get a pointer to the clock that will
+ *   effectively modify its rate when clk_set_rate(clk) is called
+ *   (might be clk itself, or any ancestor)
+ * @clk: clock source
+ *
+ * Returns struct clk corresponding to the matched clock source, or
+ * NULL on error.
+ */
+struct clk *clk_get_first_to_set_rate(struct clk *clk);
+
 /**
  * clk_save_context - save clock context for poweroff
  *
@@ -928,6 +939,11 @@  static inline struct clk *clk_get_parent(struct clk *clk)
 	return NULL;
 }
 
+static inline struct clk *clk_get_first_to_set_rate(struct clk *clk)
+{
+	return NULL;
+}
+
 static inline struct clk *clk_get_sys(const char *dev_id, const char *con_id)
 {
 	return NULL;