From patchwork Fri Jul 30 06:33:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "A, Rashmi" X-Patchwork-Id: 12410473 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA7E7C4338F for ; Fri, 30 Jul 2021 06:33:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9E26760F6B for ; Fri, 30 Jul 2021 06:33:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237462AbhG3GdZ (ORCPT ); Fri, 30 Jul 2021 02:33:25 -0400 Received: from mga18.intel.com ([134.134.136.126]:54221 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237452AbhG3GdZ (ORCPT ); Fri, 30 Jul 2021 02:33:25 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10060"; a="200247823" X-IronPort-AV: E=Sophos;i="5.84,281,1620716400"; d="scan'208";a="200247823" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jul 2021 23:33:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,281,1620716400"; d="scan'208";a="664714887" Received: from coresw01.iind.intel.com ([10.223.252.64]) by fmsmga006.fm.intel.com with ESMTP; 29 Jul 2021 23:33:15 -0700 From: rashmi.a@intel.com To: linux-drivers-review-request@eclists.intel.com, michal.simek@xilinx.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kishon@ti.com, vkoul@kernel.org, andriy.shevchenko@linux.intel.com, linux-phy@lists.infradead.org Cc: mgross@linux.intel.com, kris.pan@linux.intel.com, furong.zhou@intel.com, mallikarjunappa.sangannavar@intel.com, adrian.hunter@intel.com, mahesh.r.vaidya@intel.com, nandhini.srikandan@intel.com, kenchappa.demakkanavar@intel.com, rashmi.a@intel.com Subject: [PATCH 1/3] dt-bindings: phy: intel: Add Thunder Bay eMMC PHY bindings Date: Fri, 30 Jul 2021 12:03:07 +0530 Message-Id: <20210730063309.8194-2-rashmi.a@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210730063309.8194-1-rashmi.a@intel.com> References: <20210730063309.8194-1-rashmi.a@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Rashmi A Binding description for Intel Thunder Bay eMMC PHY. Added the newly introduced files into MAINTAINERS file-list Signed-off-by: Rashmi A --- .../phy/intel,phy-thunderbay-emmc.yaml | 49 +++++++++++++++++++ MAINTAINERS | 7 +++ 2 files changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml diff --git a/Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml b/Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml new file mode 100644 index 000000000000..5b764095746e --- /dev/null +++ b/Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/intel,phy-thunderbay-emmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Thunder Bay eMMC PHY bindings + +maintainers: + - Srikandan Nandhini + +properties: + compatible: + oneOf: + - const: intel,thunderbay-emmc-phy + - const: intel,thunderbay-sdhci-5.1 + - const: intel,thunderbay-sd-phy + + "#phy-cells": + const: 0 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: emmcclk + +required: + - "#phy-cells" + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + mmc_phy@80440800 { + #phy-cells = <0x0>; + compatible = "intel,thunderbay-emmc-phy"; + status = "okay"; + reg = <0x80440800 0x100>; + clocks = <&emmc>; + clock-names = "emmcclk"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index bd7aff0c120f..44533319c900 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9278,6 +9278,13 @@ F: drivers/crypto/keembay/keembay-ocs-hcu-core.c F: drivers/crypto/keembay/ocs-hcu.c F: drivers/crypto/keembay/ocs-hcu.h +INTEL THUNDER BAY EMMC PHY DRIVER +M: Nandhini Srikandan +M: Rashmi A +S: Maintained +F: Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml +F: drivers/phy/intel/phy-intel-thunderbay-emmc.c + INTEL MANAGEMENT ENGINE (mei) M: Tomas Winkler L: linux-kernel@vger.kernel.org