From patchwork Wed Nov 10 19:15:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 12612689 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DC23C433EF for ; Wed, 10 Nov 2021 19:16:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 856BB6117A for ; Wed, 10 Nov 2021 19:16:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232769AbhKJTTJ (ORCPT ); Wed, 10 Nov 2021 14:19:09 -0500 Received: from www.zeus03.de ([194.117.254.33]:54970 "EHLO mail.zeus03.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232707AbhKJTTI (ORCPT ); Wed, 10 Nov 2021 14:19:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple; d=sang-engineering.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=k1; bh=vF1Wsj/PEwKkfb w8YWFv/x2ThhwK4/iSmPZ0sryZuYI=; b=DxK+sTe/mwIUkIkejBdmI08IZBDwtz GMkHbangNcB1/k9Klix60gsU4HA50AUjjD3GaPeslcWeAls2UzVoIxHJF3Z7YHlE 0Rb2cnbvEBdzbMUEa3/yEW8tFO+8i7CCA7Hzsd3IbW5R67xr7tj2k7YRyP51FyR6 0bzxmTCLSwE5U= Received: (qmail 722332 invoked from network); 10 Nov 2021 20:16:19 +0100 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 10 Nov 2021 20:16:19 +0100 X-UD-Smtp-Session: l3s3148p1@sE2KD3TQ0JogAwDPXwnKAAv7bcN/CGzA From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: linux-mmc@vger.kernel.org, Yoshihiro Shimoda , Geert Uytterhoeven , Wolfram Sang Subject: [RFC PATCH v2 01/21] clk: renesas: rcar-gen3: add dummy SDnH clock Date: Wed, 10 Nov 2021 20:15:50 +0100 Message-Id: <20211110191610.5664-2-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211110191610.5664-1-wsa+renesas@sang-engineering.com> References: <20211110191610.5664-1-wsa+renesas@sang-engineering.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Currently, SDnH is handled together with SDn. This caused lots of problems, so we want SDnH as a separate clock. Introduce a dummy SDnH type here which creates a fixed-factor clock with factor 1. That allows us to convert the per-SoC CPG drivers while keeping the old behaviour for now. A later patch then will add the proper functionality. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven --- Changes since RFC v1: * fixed typo in commit message * added tag from Geert drivers/clk/renesas/rcar-cpg-lib.c | 9 +++++++++ drivers/clk/renesas/rcar-cpg-lib.h | 4 ++++ drivers/clk/renesas/rcar-gen3-cpg.c | 4 ++++ drivers/clk/renesas/rcar-gen3-cpg.h | 4 ++++ 4 files changed, 21 insertions(+) diff --git a/drivers/clk/renesas/rcar-cpg-lib.c b/drivers/clk/renesas/rcar-cpg-lib.c index 5678768ee1f2..351cb9c04f5c 100644 --- a/drivers/clk/renesas/rcar-cpg-lib.c +++ b/drivers/clk/renesas/rcar-cpg-lib.c @@ -65,6 +65,15 @@ void cpg_simple_notifier_register(struct raw_notifier_head *notifiers, /* * SDn Clock */ + +struct clk * __init cpg_sdh_clk_register(const char *name, + void __iomem *sdnckcr, const char *parent_name, + struct raw_notifier_head *notifiers) +{ + /* placeholder during transition */ + return clk_register_fixed_factor(NULL, name, parent_name, 0, 1, 1); +} + #define CPG_SD_STP_HCK BIT(9) #define CPG_SD_STP_CK BIT(8) diff --git a/drivers/clk/renesas/rcar-cpg-lib.h b/drivers/clk/renesas/rcar-cpg-lib.h index d00c91b116ca..548cb9562f35 100644 --- a/drivers/clk/renesas/rcar-cpg-lib.h +++ b/drivers/clk/renesas/rcar-cpg-lib.h @@ -26,6 +26,10 @@ void cpg_simple_notifier_register(struct raw_notifier_head *notifiers, void cpg_reg_modify(void __iomem *reg, u32 clear, u32 set); +struct clk * __init cpg_sdh_clk_register(const char *name, + void __iomem *sdnckcr, const char *parent_name, + struct raw_notifier_head *notifiers); + struct clk * __init cpg_sd_clk_register(const char *name, void __iomem *base, unsigned int offset, const char *parent_name, struct raw_notifier_head *notifiers, bool skip_first); diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index 558191c99b48..182b189bc8f4 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -486,6 +486,10 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev, mult *= 2; break; + case CLK_TYPE_GEN3_SDH: + return cpg_sdh_clk_register(core->name, base + core->offset, + __clk_get_name(parent), notifiers); + case CLK_TYPE_GEN3_SD: return cpg_sd_clk_register(core->name, base, core->offset, __clk_get_name(parent), notifiers, diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h index 3d949c4a3244..2bc0afadf604 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -17,6 +17,7 @@ enum rcar_gen3_clk_types { CLK_TYPE_GEN3_PLL2, CLK_TYPE_GEN3_PLL3, CLK_TYPE_GEN3_PLL4, + CLK_TYPE_GEN3_SDH, CLK_TYPE_GEN3_SD, CLK_TYPE_GEN3_R, CLK_TYPE_GEN3_MDSEL, /* Select parent/divider using mode pin */ @@ -32,6 +33,9 @@ enum rcar_gen3_clk_types { CLK_TYPE_GEN3_SOC_BASE, }; +#define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ + DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset) + #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)