diff mbox series

[V3,2/2] mmc:sdhci-pci-o2micro:Make the SD clock's base clock frequency correctly according to different card mode

Message ID 20211216060824.357-2-fred.ai@bayhubtech.com (mailing list archive)
State New, archived
Headers show
Series [V3,1/2] mmc:sdhci-pci-o2micro:Improve card input timing at SDR104/HS200 mode | expand

Commit Message

Fred Ai(WH) Dec. 16, 2021, 6:08 a.m. UTC
From: Fred Ai <fred.ai@bayhubtech.com>

Remove SDR104 card, SD clock's base clock
frequency is not right when insert SD2.0/SDR50 card

Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>
---
Change in V3:
1.Set SD clock's base clock frequency to 208MHz when card mode is SDR104/HS200.
2.Set SD clock's base clock frequency to 200MHz when card mode is SD2.0/SDR50.
---
 drivers/mmc/host/sdhci-pci-o2micro.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Adrian Hunter Dec. 17, 2021, 6:49 a.m. UTC | #1
On 16/12/2021 08:08, fred wrote:
> From: Fred Ai <fred.ai@bayhubtech.com>
> 
> Remove SDR104 card, SD clock's base clock
> frequency is not right when insert SD2.0/SDR50 card
> 
> Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
> Change in V3:
> 1.Set SD clock's base clock frequency to 208MHz when card mode is SDR104/HS200.
> 2.Set SD clock's base clock frequency to 200MHz when card mode is SD2.0/SDR50.
> ---
>  drivers/mmc/host/sdhci-pci-o2micro.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
> index f55602609f8c..4ca1e8c5b631 100644
> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> @@ -577,6 +577,11 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
>  
>  		if ((scratch_32 & 0xFFFF0000) != 0x2c280000)
>  			o2_pci_set_baseclk(chip, 0x2c280000);
> +	} else {
> +		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
> +
> +		if ((scratch_32 & 0xFFFF0000) != 0x25100000)
> +			o2_pci_set_baseclk(chip, 0x25100000);
>  	}
>  
>  	pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
>
Ulf Hansson Dec. 28, 2021, 4:57 p.m. UTC | #2
On Thu, 16 Dec 2021 at 07:08, fred <fred.ai@bayhubtech.com> wrote:
>
> From: Fred Ai <fred.ai@bayhubtech.com>
>
> Remove SDR104 card, SD clock's base clock
> frequency is not right when insert SD2.0/SDR50 card
>
> Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>

Applied for next, thanks!

Kind regards
Uffe


> ---
> Change in V3:
> 1.Set SD clock's base clock frequency to 208MHz when card mode is SDR104/HS200.
> 2.Set SD clock's base clock frequency to 200MHz when card mode is SD2.0/SDR50.
> ---
>  drivers/mmc/host/sdhci-pci-o2micro.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
> index f55602609f8c..4ca1e8c5b631 100644
> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> @@ -577,6 +577,11 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
>
>                 if ((scratch_32 & 0xFFFF0000) != 0x2c280000)
>                         o2_pci_set_baseclk(chip, 0x2c280000);
> +       } else {
> +               pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
> +
> +               if ((scratch_32 & 0xFFFF0000) != 0x25100000)
> +                       o2_pci_set_baseclk(chip, 0x25100000);
>         }
>
>         pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
> --
> 2.32.0
>
diff mbox series

Patch

diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
index f55602609f8c..4ca1e8c5b631 100644
--- a/drivers/mmc/host/sdhci-pci-o2micro.c
+++ b/drivers/mmc/host/sdhci-pci-o2micro.c
@@ -577,6 +577,11 @@  static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
 
 		if ((scratch_32 & 0xFFFF0000) != 0x2c280000)
 			o2_pci_set_baseclk(chip, 0x2c280000);
+	} else {
+		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
+
+		if ((scratch_32 & 0xFFFF0000) != 0x25100000)
+			o2_pci_set_baseclk(chip, 0x25100000);
 	}
 
 	pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);