diff mbox series

[v2,2/2] mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0

Message ID 20220517180435.29940-3-kdasu.kdev@gmail.com (mailing list archive)
State New, archived
Headers show
Series mmc: sdhci-brcmstb: Add support for optional sdio_freq clock | expand

Commit Message

Kamal Dasu May 17, 2022, 6:04 p.m. UTC 
From: Al Cooper <alcooperx@gmail.com>

The 72116B0 has improved SDIO controllers that allow the max clock
rate to be increased from a max of 100MHz to a max of 150MHz. The
driver will need to get the clock and increase it's default rate
and override the caps register, that still indicates a max of 100MHz.
The new clock will be named "sdio_freq" in the DT node's "clock-names"
list. The driver will use a DT property, "max-frequency", to
enable this functionality and will get the actual rate in MHz
from the property to allow various speeds to be requested.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
---
 drivers/mmc/host/sdhci-brcmstb.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

Florian Fainelli May 17, 2022, 8:29 p.m. UTC | #1 
Hi Kamal,

On 5/17/2022 11:04 AM, Kamal Dasu wrote:
> From: Al Cooper <alcooperx@gmail.com>
> 
> The 72116B0 has improved SDIO controllers that allow the max clock
> rate to be increased from a max of 100MHz to a max of 150MHz. The
> driver will need to get the clock and increase it's default rate
> and override the caps register, that still indicates a max of 100MHz.
> The new clock will be named "sdio_freq" in the DT node's "clock-names"
> list. The driver will use a DT property, "max-frequency", to
> enable this functionality and will get the actual rate in MHz
> from the property to allow various speeds to be requested.
> 
> Signed-off-by: Al Cooper <alcooperx@gmail.com>
> Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
> ---
>   drivers/mmc/host/sdhci-brcmstb.c | 28 ++++++++++++++++++++++++++++
>   1 file changed, 28 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
> index 8eb57de48e0c..bb614a5e1ea4 100644
> --- a/drivers/mmc/host/sdhci-brcmstb.c
> +++ b/drivers/mmc/host/sdhci-brcmstb.c
> @@ -250,6 +250,8 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
>   	struct sdhci_pltfm_host *pltfm_host;
>   	const struct of_device_id *match;
>   	struct sdhci_brcmstb_priv *priv;
> +	struct clk *master_clk;
> +	u32 actual_clock_mhz;
>   	struct sdhci_host *host;
>   	struct resource *iomem;
>   	struct clk *clk;
> @@ -330,6 +332,32 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
>   	if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT)
>   		host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
>   
> +	/* Change the base clock frequency if the DT property exists */
> +	if (!(host->mmc->f_max))
> +		goto add_host;
> +
> +	master_clk = devm_clk_get(&pdev->dev, "sdio_freq");

This looks like a candidate for devm_clk_get_optional() since the clock 
is optional. Then you can call clk_prepare_enable() unconditionally even 
if it is NULL/non-existent.

> +	if (IS_ERR(master_clk)) {
> +		dev_warn(&pdev->dev, "Clock for \"sdio_freq\" not found\n");
> +		goto add_host;
> +	} else {
> +		res = clk_prepare_enable(master_clk);
> +		if (res)
> +			goto err;

It looks like we may be leaving the clock enabled even when we did not 
want to (e.g.: error path) and do not we need to turn if off, 
respectively turn it back on in .suspend() and .resume()?

> +	}
> +
> +	/* set improved clock rate */
> +	clk_set_rate(master_clk, host->mmc->f_max);
> +	actual_clock_mhz = clk_get_rate(master_clk) / 1000000;
> +
> +	host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK;
> +	host->caps |= (actual_clock_mhz << SDHCI_CLOCK_BASE_SHIFT);
> +	/* Disable presets because they are now incorrect */
> +	host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
> +	dev_dbg(&pdev->dev, "Base Clock Frequency changed to %dMHz\n",
> +		actual_clock_mhz);
> +
> +add_host:
>   	res = sdhci_brcmstb_add_host(host, priv);
>   	if (res)
>   		goto err;

It looks like we would need to unwind the clk_prepare_enable(master_clk) 
in case of failures here.
diff mbox series

Patch

diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
index 8eb57de48e0c..bb614a5e1ea4 100644
--- a/drivers/mmc/host/sdhci-brcmstb.c
+++ b/drivers/mmc/host/sdhci-brcmstb.c
@@ -250,6 +250,8 @@  static int sdhci_brcmstb_probe(struct platform_device *pdev)
 	struct sdhci_pltfm_host *pltfm_host;
 	const struct of_device_id *match;
 	struct sdhci_brcmstb_priv *priv;
+	struct clk *master_clk;
+	u32 actual_clock_mhz;
 	struct sdhci_host *host;
 	struct resource *iomem;
 	struct clk *clk;
@@ -330,6 +332,32 @@  static int sdhci_brcmstb_probe(struct platform_device *pdev)
 	if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT)
 		host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
 
+	/* Change the base clock frequency if the DT property exists */
+	if (!(host->mmc->f_max))
+		goto add_host;
+
+	master_clk = devm_clk_get(&pdev->dev, "sdio_freq");
+	if (IS_ERR(master_clk)) {
+		dev_warn(&pdev->dev, "Clock for \"sdio_freq\" not found\n");
+		goto add_host;
+	} else {
+		res = clk_prepare_enable(master_clk);
+		if (res)
+			goto err;
+	}
+
+	/* set improved clock rate */
+	clk_set_rate(master_clk, host->mmc->f_max);
+	actual_clock_mhz = clk_get_rate(master_clk) / 1000000;
+
+	host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK;
+	host->caps |= (actual_clock_mhz << SDHCI_CLOCK_BASE_SHIFT);
+	/* Disable presets because they are now incorrect */
+	host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
+	dev_dbg(&pdev->dev, "Base Clock Frequency changed to %dMHz\n",
+		actual_clock_mhz);
+
+add_host:
 	res = sdhci_brcmstb_add_host(host, priv);
 	if (res)
 		goto err;