diff mbox series

[v2] mmc: sdhci-pci-core: Disable ES for ASUS BIOS on Jasper Lake

Message ID 20220919204651.1517899-1-ptf@google.com (mailing list archive)
State New, archived
Headers show
Series [v2] mmc: sdhci-pci-core: Disable ES for ASUS BIOS on Jasper Lake | expand

Commit Message

Patrick Thompson Sept. 19, 2022, 8:46 p.m. UTC
Enhanced Strobe (ES) does not work correctly on the ASUS 1100 series of
devices. Jasper Lake eMMCs (pci_id 8086:4dc4) are supposed to support
ES. There are also two system families under the series, thus this is
being scoped to the ASUS BIOS.

The failing ES prevents the installer from writing to disk. Falling back
to HS400 without ES fixes the issue.

Signed-off-by: Patrick Thompson <ptf@google.com>

---

Changes in v2:
V1->V2:
* Only disable ES instead of CQE in its entirety.
* Target Jasper Lake (JSL)
* Target ASUS BIOS instead of specific system family

 drivers/mmc/host/sdhci-pci-core.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

Comments

Adrian Hunter Sept. 22, 2022, 8:20 a.m. UTC | #1
On 19/09/22 23:46, Patrick Thompson wrote:
> Enhanced Strobe (ES) does not work correctly on the ASUS 1100 series of
> devices. Jasper Lake eMMCs (pci_id 8086:4dc4) are supposed to support
> ES. There are also two system families under the series, thus this is
> being scoped to the ASUS BIOS.
> 
> The failing ES prevents the installer from writing to disk. Falling back
> to HS400 without ES fixes the issue.
> 
> Signed-off-by: Patrick Thompson <ptf@google.com>

Presumably needs a fixes tag i.e.

Fixes: 315e3bd7ac19 ("mmc: sdhci-pci: Add support for Intel JSL")

> 
> ---
> 
> Changes in v2:
> V1->V2:
> * Only disable ES instead of CQE in its entirety.
> * Target Jasper Lake (JSL)
> * Target ASUS BIOS instead of specific system family
> 
>  drivers/mmc/host/sdhci-pci-core.c | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c
> index 622b7de96c7f..42406f76f65c 100644
> --- a/drivers/mmc/host/sdhci-pci-core.c
> +++ b/drivers/mmc/host/sdhci-pci-core.c
> @@ -893,6 +893,12 @@ static bool glk_broken_cqhci(struct sdhci_pci_slot *slot)
>  		dmi_match(DMI_SYS_VENDOR, "IRBIS"));
>  }
>  
> +static bool jsl_broken_hs400es(struct sdhci_pci_slot *slot)
> +{
> +	return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_JSL_EMMC &&
> +			dmi_match(DMI_BIOS_VENDOR, "ASUSTeK COMPUTER INC.");
> +}
> +
>  static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
>  {
>  	int ret = byt_emmc_probe_slot(slot);
> @@ -901,9 +907,13 @@ static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
>  		slot->host->mmc->caps2 |= MMC_CAP2_CQE;
>  
>  	if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) {
> -		slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES;
> -		slot->host->mmc_host_ops.hs400_enhanced_strobe =
> -						intel_hs400_enhanced_strobe;
> +		if (jsl_broken_hs400es(slot)) {
> +			slot->host->mmc->caps2 |= MMC_CAP2_HS400;

HS400 capability is already selected by SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400
so this is not needed here.

> +		} else {
> +			slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES;
> +			slot->host->mmc_host_ops.hs400_enhanced_strobe =
> +							intel_hs400_enhanced_strobe;
> +		}
>  		slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
>  	}
>
diff mbox series

Patch

diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c
index 622b7de96c7f..42406f76f65c 100644
--- a/drivers/mmc/host/sdhci-pci-core.c
+++ b/drivers/mmc/host/sdhci-pci-core.c
@@ -893,6 +893,12 @@  static bool glk_broken_cqhci(struct sdhci_pci_slot *slot)
 		dmi_match(DMI_SYS_VENDOR, "IRBIS"));
 }
 
+static bool jsl_broken_hs400es(struct sdhci_pci_slot *slot)
+{
+	return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_JSL_EMMC &&
+			dmi_match(DMI_BIOS_VENDOR, "ASUSTeK COMPUTER INC.");
+}
+
 static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
 {
 	int ret = byt_emmc_probe_slot(slot);
@@ -901,9 +907,13 @@  static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
 		slot->host->mmc->caps2 |= MMC_CAP2_CQE;
 
 	if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) {
-		slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES;
-		slot->host->mmc_host_ops.hs400_enhanced_strobe =
-						intel_hs400_enhanced_strobe;
+		if (jsl_broken_hs400es(slot)) {
+			slot->host->mmc->caps2 |= MMC_CAP2_HS400;
+		} else {
+			slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES;
+			slot->host->mmc_host_ops.hs400_enhanced_strobe =
+							intel_hs400_enhanced_strobe;
+		}
 		slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
 	}