| Message ID | 20230308155838.1094920-2-abel.vesa@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add dedicated Qcom ICE driver | expand |
On 08/03/2023 16:58, Abel Vesa wrote: > Add schema file for new Qualcomm Inline Crypto Engine driver. Subject: drop second/last, redundant "schema for". The "dt-bindings" prefix is already stating that these are bindings. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > > This patch was not part of the v1. > > .../soc/qcom/qcom,inline-crypto-engine.yaml | 42 +++++++++++++++++++ > 1 file changed, 42 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,inline-crypto-engine.yaml > > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,inline-crypto-engine.yaml > new file mode 100644 > index 000000000000..359f80dd97cb > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,inline-crypto-engine.yaml soc should not be placeholder for everything. Put it in crypto/ > @@ -0,0 +1,42 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/qcom/qcom,inline-crypto-engine.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Technologies, Inc. (QTI) Inline Crypto Engine > + > +maintainers: > + - Bjorn Andersson <andersson@kernel.org> > + > +description: > + Inline Crypto Engine Please add useful description or drop. > + > +properties: > + compatible: > + enum: > + - qcom,inline-crypto-engine You need SoC specific compatible(s). > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-sm8450.h> > + > + ice: inline-crypto-engine@1d88000 { Just: crypto Also drop the label Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,inline-crypto-engine.yaml new file mode 100644 index 000000000000..359f80dd97cb --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,inline-crypto-engine.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,inline-crypto-engine.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. (QTI) Inline Crypto Engine + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + +description: + Inline Crypto Engine + +properties: + compatible: + enum: + - qcom,inline-crypto-engine + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sm8450.h> + + ice: inline-crypto-engine@1d88000 { + compatible = "qcom,inline-crypto-engine"; + reg = <0x01d88000 0x8000>; + clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + }; +...
Add schema file for new Qualcomm Inline Crypto Engine driver. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- This patch was not part of the v1. .../soc/qcom/qcom,inline-crypto-engine.yaml | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,inline-crypto-engine.yaml