| Message ID | 20230912081402.51477-7-william.qiu@starfivetech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] dt-bindings: mmc: Remove properties from required | expand |
William Qiu wrote: > Drop unused properties and limit cclk_in to 50M, thus cancelling the > internal frequency and adopting the by-pass mode. That's two unrelated changes which should really be in different patches. But again the hardware still has the relevant field in the syscon registers even if the driver doesn't use it, so maybe just leave them and just keep this patch adding the assigned-clock* properties. /Emil > > Signed-off-by: William Qiu <william.qiu@starfivetech.com> > --- > .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ > arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 -- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > index d79f94432b27..d1f2ec308bca 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > @@ -205,6 +205,8 @@ &i2c6 { > > &mmc0 { > max-frequency = <100000000>; > + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; > + assigned-clock-rates = <50000000>; > bus-width = <8>; > cap-mmc-highspeed; > mmc-ddr-1_8v; > @@ -221,6 +223,8 @@ &mmc0 { > > &mmc1 { > max-frequency = <100000000>; > + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; > + assigned-clock-rates = <50000000>; > bus-width = <4>; > no-sdio; > no-mmc; > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > index e85464c328d0..7b8e841aeef8 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > @@ -870,7 +870,6 @@ mmc0: mmc@16010000 { > fifo-depth = <32>; > fifo-watermark-aligned; > data-addr = <0>; > - starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>; > status = "disabled"; > }; > > @@ -886,7 +885,6 @@ mmc1: mmc@16020000 { > fifo-depth = <32>; > fifo-watermark-aligned; > data-addr = <0>; > - starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>; > status = "disabled"; > }; > > -- > 2.34.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On 2023/9/12 21:23, Emil Renner Berthing wrote: > William Qiu wrote: >> Drop unused properties and limit cclk_in to 50M, thus cancelling the >> internal frequency and adopting the by-pass mode. > > That's two unrelated changes which should really be in different patches. But > again the hardware still has the relevant field in the syscon registers even if > the driver doesn't use it, so maybe just leave them and just keep this patch > adding the assigned-clock* properties. > > /Emil > >> Will update. Best Regards, William >> Signed-off-by: William Qiu <william.qiu@starfivetech.com> >> --- >> .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ >> arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 -- >> 2 files changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi >> index d79f94432b27..d1f2ec308bca 100644 >> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi >> @@ -205,6 +205,8 @@ &i2c6 { >> >> &mmc0 { >> max-frequency = <100000000>; >> + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; >> + assigned-clock-rates = <50000000>; >> bus-width = <8>; >> cap-mmc-highspeed; >> mmc-ddr-1_8v; >> @@ -221,6 +223,8 @@ &mmc0 { >> >> &mmc1 { >> max-frequency = <100000000>; >> + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; >> + assigned-clock-rates = <50000000>; >> bus-width = <4>; >> no-sdio; >> no-mmc; >> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi >> index e85464c328d0..7b8e841aeef8 100644 >> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi >> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi >> @@ -870,7 +870,6 @@ mmc0: mmc@16010000 { >> fifo-depth = <32>; >> fifo-watermark-aligned; >> data-addr = <0>; >> - starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>; >> status = "disabled"; >> }; >> >> @@ -886,7 +885,6 @@ mmc1: mmc@16020000 { >> fifo-depth = <32>; >> fifo-watermark-aligned; >> data-addr = <0>; >> - starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>; >> status = "disabled"; >> }; >> >> -- >> 2.34.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index d79f94432b27..d1f2ec308bca 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -205,6 +205,8 @@ &i2c6 { &mmc0 { max-frequency = <100000000>; + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; + assigned-clock-rates = <50000000>; bus-width = <8>; cap-mmc-highspeed; mmc-ddr-1_8v; @@ -221,6 +223,8 @@ &mmc0 { &mmc1 { max-frequency = <100000000>; + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; + assigned-clock-rates = <50000000>; bus-width = <4>; no-sdio; no-mmc; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index e85464c328d0..7b8e841aeef8 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -870,7 +870,6 @@ mmc0: mmc@16010000 { fifo-depth = <32>; fifo-watermark-aligned; data-addr = <0>; - starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>; status = "disabled"; }; @@ -886,7 +885,6 @@ mmc1: mmc@16020000 { fifo-depth = <32>; fifo-watermark-aligned; data-addr = <0>; - starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>; status = "disabled"; };
Drop unused properties and limit cclk_in to 50M, thus cancelling the internal frequency and adopting the by-pass mode. Signed-off-by: William Qiu <william.qiu@starfivetech.com> --- .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 -- 2 files changed, 4 insertions(+), 2 deletions(-)