diff mbox series

[V1,1/1] mmc: sdhci-pci-o2micro: Fix a warm reboot issue that disk can't be detected by BIOS

Message ID 20240203102908.4683-1-fredaibayhubtech@126.com (mailing list archive)
State New
Headers show
Series [V1,1/1] mmc: sdhci-pci-o2micro: Fix a warm reboot issue that disk can't be detected by BIOS | expand

Commit Message

fredaibayhubtech@126.com Feb. 3, 2024, 10:29 a.m. UTC 
From: Fred Ai <fred.ai@bayhubtech.com>

Driver shall switch clock source from DLL clock to
OPE clock when power off card to ensure that card
can be identified with OPE clock by BIOS.

Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>
---
Change in V1:
Implement the "set_power" callback in sdhci_ops,
then switch PCR register 0x354 clock source back to
OPE clock when power off card.
---
 drivers/mmc/host/sdhci-pci-o2micro.c | 30 ++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)


base-commit: 56897d51886fa7e9f034ff26128eb09f1b811594

Comments

Ulf Hansson Feb. 5, 2024, 3:28 p.m. UTC | #1 
On Sat, 3 Feb 2024 at 11:29, <fredaibayhubtech@126.com> wrote:
>
> From: Fred Ai <fred.ai@bayhubtech.com>
>
> Driver shall switch clock source from DLL clock to
> OPE clock when power off card to ensure that card
> can be identified with OPE clock by BIOS.
>
> Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>

I assume we want a stable tag to be added to this, but perhaps we can
also add a fixes tag? In that case, what is the commit this is fixing?

Kind regards
Uffe

> ---
> Change in V1:
> Implement the "set_power" callback in sdhci_ops,
> then switch PCR register 0x354 clock source back to
> OPE clock when power off card.
> ---
>  drivers/mmc/host/sdhci-pci-o2micro.c | 30 ++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
> index 7bfee28116af..d4a02184784a 100644
> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> @@ -693,6 +693,35 @@ static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *io
>         return 0;
>  }
>
> +static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned char mode,  unsigned short vdd)
> +{
> +       struct sdhci_pci_chip *chip;
> +       struct sdhci_pci_slot *slot = sdhci_priv(host);
> +       u32 scratch_32 = 0;
> +       u8 scratch_8 = 0;
> +
> +       chip = slot->chip;
> +
> +       if (mode == MMC_POWER_OFF) {
> +               /* UnLock WP */
> +               pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> +               scratch_8 &= 0x7f;
> +               pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
> +
> +               /* Set PCR 0x354[16] to switch Clock Source back to OPE Clock */
> +               pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
> +               scratch_32 &= ~(O2_SD_SEL_DLL);
> +               pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
> +
> +               /* Lock WP */
> +               pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> +               scratch_8 |= 0x80;
> +               pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
> +       }
> +
> +       sdhci_set_power(host, mode, vdd);
> +}
> +
>  static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
>  {
>         struct sdhci_pci_chip *chip;
> @@ -1051,6 +1080,7 @@ static const struct sdhci_ops sdhci_pci_o2_ops = {
>         .set_bus_width = sdhci_set_bus_width,
>         .reset = sdhci_reset,
>         .set_uhs_signaling = sdhci_set_uhs_signaling,
> +       .set_power = sdhci_pci_o2_set_power,
>  };
>
>  const struct sdhci_pci_fixes sdhci_o2 = {
>
> base-commit: 56897d51886fa7e9f034ff26128eb09f1b811594
> --
> 2.25.1
>
Fred Ai(WH) Feb. 6, 2024, 6:43 a.m. UTC | #2 
Hi Uffe
I fixed this issue was based on below commit history.

commit 4be33cf187036744b4ed84824e7157cfc09c6f4c (HEAD)
Author: Fred Ai <fred.ai@bayhubtech.com>
Date:   Mon Dec 20 20:09:40 2021 -0800

    mmc: sdhci-pci-o2micro: Improve card input timing at SDR104/HS200 mode
    
    Card input timing is margin, need to adjust the hold timing of card input.
    
    Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>
    Link: https://lore.kernel.org/r/20211221040940.484-1-fred.ai@bayhubtech.com
    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

Best regards
Fred

-----邮件原件-----
发件人: Ulf Hansson <ulf.hansson@linaro.org> 
发送时间: 2024年2月5日 23:28
收件人: fredaibayhubtech@126.com
抄送: adrian.hunter@intel.com; linux-mmc@vger.kernel.org; linux.kernel@vger.kernel.org; Shaper Liu (WH) <shaper.liu@bayhubtech.com>; Chevron Li (WH) <chevron.li@bayhubtech.com>; XiaoGuang Yu (WH) <xiaoguang.yu@bayhubtech.com>; Fred Ai(WH) <fred.ai@bayhubtech.com>
主题: Re: [PATCH V1 1/1] mmc: sdhci-pci-o2micro: Fix a warm reboot issue that disk can't be detected by BIOS

On Sat, 3 Feb 2024 at 11:29, <fredaibayhubtech@126.com> wrote:
>
> From: Fred Ai <fred.ai@bayhubtech.com>
>
> Driver shall switch clock source from DLL clock to OPE clock when 
> power off card to ensure that card can be identified with OPE clock by 
> BIOS.
>
> Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>

I assume we want a stable tag to be added to this, but perhaps we can also add a fixes tag? In that case, what is the commit this is fixing?

Kind regards
Uffe

> ---
> Change in V1:
> Implement the "set_power" callback in sdhci_ops, then switch PCR 
> register 0x354 clock source back to OPE clock when power off card.
> ---
>  drivers/mmc/host/sdhci-pci-o2micro.c | 30 
> ++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c 
> b/drivers/mmc/host/sdhci-pci-o2micro.c
> index 7bfee28116af..d4a02184784a 100644
> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> @@ -693,6 +693,35 @@ static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *io
>         return 0;
>  }
>
> +static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned 
> +char mode,  unsigned short vdd) {
> +       struct sdhci_pci_chip *chip;
> +       struct sdhci_pci_slot *slot = sdhci_priv(host);
> +       u32 scratch_32 = 0;
> +       u8 scratch_8 = 0;
> +
> +       chip = slot->chip;
> +
> +       if (mode == MMC_POWER_OFF) {
> +               /* UnLock WP */
> +               pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> +               scratch_8 &= 0x7f;
> +               pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, 
> + scratch_8);
> +
> +               /* Set PCR 0x354[16] to switch Clock Source back to OPE Clock */
> +               pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
> +               scratch_32 &= ~(O2_SD_SEL_DLL);
> +               pci_write_config_dword(chip->pdev, 
> + O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
> +
> +               /* Lock WP */
> +               pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> +               scratch_8 |= 0x80;
> +               pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
> +       }
> +
> +       sdhci_set_power(host, mode, vdd); }
> +
>  static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)  {
>         struct sdhci_pci_chip *chip;
> @@ -1051,6 +1080,7 @@ static const struct sdhci_ops sdhci_pci_o2_ops = {
>         .set_bus_width = sdhci_set_bus_width,
>         .reset = sdhci_reset,
>         .set_uhs_signaling = sdhci_set_uhs_signaling,
> +       .set_power = sdhci_pci_o2_set_power,
>  };
>
>  const struct sdhci_pci_fixes sdhci_o2 = {
>
> base-commit: 56897d51886fa7e9f034ff26128eb09f1b811594
> --
> 2.25.1
>
Ulf Hansson Feb. 6, 2024, 11:11 a.m. UTC | #3 
On Tue, 6 Feb 2024 at 07:43, Fred Ai(WH) <fred.ai@bayhubtech.com> wrote:
>
> Hi Uffe
> I fixed this issue was based on below commit history.
>
> commit 4be33cf187036744b4ed84824e7157cfc09c6f4c (HEAD)
> Author: Fred Ai <fred.ai@bayhubtech.com>
> Date:   Mon Dec 20 20:09:40 2021 -0800
>
>     mmc: sdhci-pci-o2micro: Improve card input timing at SDR104/HS200 mode
>
>     Card input timing is margin, need to adjust the hold timing of card input.
>
>     Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>
>     Link: https://lore.kernel.org/r/20211221040940.484-1-fred.ai@bayhubtech.com
>     Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
>
> Best regards
> Fred

Thanks Fred,

Patch applied for fixes with a fixes-tag according to the above and by
adding a stable tag, thanks!

Kind regards
Uffe

>
> -----邮件原件-----
> 发件人: Ulf Hansson <ulf.hansson@linaro.org>
> 发送时间: 2024年2月5日 23:28
> 收件人: fredaibayhubtech@126.com
> 抄送: adrian.hunter@intel.com; linux-mmc@vger.kernel.org; linux.kernel@vger.kernel.org; Shaper Liu (WH) <shaper.liu@bayhubtech.com>; Chevron Li (WH) <chevron.li@bayhubtech.com>; XiaoGuang Yu (WH) <xiaoguang.yu@bayhubtech.com>; Fred Ai(WH) <fred.ai@bayhubtech.com>
> 主题: Re: [PATCH V1 1/1] mmc: sdhci-pci-o2micro: Fix a warm reboot issue that disk can't be detected by BIOS
>
> On Sat, 3 Feb 2024 at 11:29, <fredaibayhubtech@126.com> wrote:
> >
> > From: Fred Ai <fred.ai@bayhubtech.com>
> >
> > Driver shall switch clock source from DLL clock to OPE clock when
> > power off card to ensure that card can be identified with OPE clock by
> > BIOS.
> >
> > Signed-off-by: Fred Ai <fred.ai@bayhubtech.com>
>
> I assume we want a stable tag to be added to this, but perhaps we can also add a fixes tag? In that case, what is the commit this is fixing?
>
> Kind regards
> Uffe
>
> > ---
> > Change in V1:
> > Implement the "set_power" callback in sdhci_ops, then switch PCR
> > register 0x354 clock source back to OPE clock when power off card.
> > ---
> >  drivers/mmc/host/sdhci-pci-o2micro.c | 30
> > ++++++++++++++++++++++++++++
> >  1 file changed, 30 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c
> > b/drivers/mmc/host/sdhci-pci-o2micro.c
> > index 7bfee28116af..d4a02184784a 100644
> > --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> > +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> > @@ -693,6 +693,35 @@ static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *io
> >         return 0;
> >  }
> >
> > +static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned
> > +char mode,  unsigned short vdd) {
> > +       struct sdhci_pci_chip *chip;
> > +       struct sdhci_pci_slot *slot = sdhci_priv(host);
> > +       u32 scratch_32 = 0;
> > +       u8 scratch_8 = 0;
> > +
> > +       chip = slot->chip;
> > +
> > +       if (mode == MMC_POWER_OFF) {
> > +               /* UnLock WP */
> > +               pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> > +               scratch_8 &= 0x7f;
> > +               pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP,
> > + scratch_8);
> > +
> > +               /* Set PCR 0x354[16] to switch Clock Source back to OPE Clock */
> > +               pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
> > +               scratch_32 &= ~(O2_SD_SEL_DLL);
> > +               pci_write_config_dword(chip->pdev,
> > + O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
> > +
> > +               /* Lock WP */
> > +               pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> > +               scratch_8 |= 0x80;
> > +               pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
> > +       }
> > +
> > +       sdhci_set_power(host, mode, vdd); }
> > +
> >  static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)  {
> >         struct sdhci_pci_chip *chip;
> > @@ -1051,6 +1080,7 @@ static const struct sdhci_ops sdhci_pci_o2_ops = {
> >         .set_bus_width = sdhci_set_bus_width,
> >         .reset = sdhci_reset,
> >         .set_uhs_signaling = sdhci_set_uhs_signaling,
> > +       .set_power = sdhci_pci_o2_set_power,
> >  };
> >
> >  const struct sdhci_pci_fixes sdhci_o2 = {
> >
> > base-commit: 56897d51886fa7e9f034ff26128eb09f1b811594
> > --
> > 2.25.1
> >
diff mbox series

Patch

diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
index 7bfee28116af..d4a02184784a 100644
--- a/drivers/mmc/host/sdhci-pci-o2micro.c
+++ b/drivers/mmc/host/sdhci-pci-o2micro.c
@@ -693,6 +693,35 @@  static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *io
 	return 0;
 }
 
+static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned char mode,  unsigned short vdd)
+{
+	struct sdhci_pci_chip *chip;
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	u32 scratch_32 = 0;
+	u8 scratch_8 = 0;
+
+	chip = slot->chip;
+
+	if (mode == MMC_POWER_OFF) {
+		/* UnLock WP */
+		pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
+		scratch_8 &= 0x7f;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
+
+		/* Set PCR 0x354[16] to switch Clock Source back to OPE Clock */
+		pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
+		scratch_32 &= ~(O2_SD_SEL_DLL);
+		pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
+
+		/* Lock WP */
+		pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
+		scratch_8 |= 0x80;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
+	}
+
+	sdhci_set_power(host, mode, vdd);
+}
+
 static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
 {
 	struct sdhci_pci_chip *chip;
@@ -1051,6 +1080,7 @@  static const struct sdhci_ops sdhci_pci_o2_ops = {
 	.set_bus_width = sdhci_set_bus_width,
 	.reset = sdhci_reset,
 	.set_uhs_signaling = sdhci_set_uhs_signaling,
+	.set_power = sdhci_pci_o2_set_power,
 };
 
 const struct sdhci_pci_fixes sdhci_o2 = {