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Mon, 1 Jul 2024 08:13:33 -0700 From: Krishna Yarlagadda To: , , , , , CC: , , , , , , , , , , , , , Subject: [RFC PATCH V2 10/12] dt-bindings: mmc: tegra-sdhci: reference to config Date: Mon, 1 Jul 2024 20:42:28 +0530 Message-ID: <20240701151231.29425-11-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240701151231.29425-1-kyarlagadda@nvidia.com> References: <20240701151231.29425-1-kyarlagadda@nvidia.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE38:EE_|PH7PR12MB7938:EE_ X-MS-Office365-Filtering-Correlation-Id: 08e297bd-0fd1-4561-eaf6-08dc99e06ed5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|7416014|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: SLQ0QZtQchyx8NDqJ4SH/Hhde2tK5mffRGlKJKfi/+eoKpVk732GcVXG3rnURgxC2Jlyz0+/63wUgw0A582+BCcYqKGZggaVz70eSrSplGym8ecxPkl6nnf/0yvGWpAn/yoHhS1qIfZfYBHB0u5Up6v61+qASo1+YCDBZkP/6sd7JeTW3z9rbgPBBsMvwYBW6GoH6Pf4Od9Vfo6UhQyNLaOpLlWeM4+6fAYEkps8tIuUldrd3EqLUI7D1sGF5xahcJdHMbCRKgnPFHf5x9Vxtbdwc7FQRGWCjqgU0jTmVTGHLxutVTYZBN9ZT56v0UYpOMIGAMHz97+jIO2ESNW6BCucEpuDvrHv2PBb3hTRF30ypfhX5bhKtT4fhoCDRYlLtuAkbC4fbRskZBJq1uwH8CM4Ny1vpwyd6l0LkY0ZDgfrlfmXGdiBYGHQaw3OEZuH4UkTn2hMzyQLOYXnPz4uzsE4XlKRMulLUHWmN5xy4gQLJLVu3/7TRp7zE+c2YVd349g8O0tn4Bg9vglsFdCxMAe/5VOnx2QpvtDL1O+rnxkqgPuUebWEm5inm4s/z0/semAZoju5FSxE/tIGIB8Xdg4+8x0tskh9iVHfZihVPp6dz+FhQgqiDyMe81zd9cPmtRRe3auoxpbFo4PCx7z9R1BeUY2sGAaKnfF0v8PlVsZVkwdMVU+bwEEpHeKTYXdlAaPoVJpBhvGUfmq12Mp3dRMebhnamW8b55UsSXT1uBuq6IKxQT1Kan3PdUcQqf0QjF+kubEiA/QvBfryw9fNRAfFWBputJe/a9CwTPooItmu7r0YRHivSikdn7Q8q8+ZxbaMN24RYdpT7Bfr/wvxsYhD/RfEr/U7l3zYjdA/l63aXR7bHc9+X9OLI1NLo2BmhYVlttjNq5N6+49SVdM6QIJm0w1jN1So/nYRI6/KixG+leGd2VRjpuy3z6GdMH6z/bR5NvUqUhTH1JE0LbjUOR31uRf3VPqHvxou9Y9N16Jt0X1uQ3Egad9BXyrFK+oN2XIhYU/aMWXYzaYXeO1XRv3zuQjGWdh1X0SwyJZmvV5nDyrnOFoJuktuvy0V9SLoQdQBc5Glckvg1jbYR59ZsyepHMJJrvsLBFq9qFM8ezWzDYFMbgDH2e8luXxzr0T1perzsjqo0uJpqRtE+8trx+yipp3rKtplvJpck99CE09gD3pa6ztMPX6+DUrKAuqxt1TsG0K4N3Fom7N6ZBAK/6V3ALq3VwqmgOoYGoZKxJNXdEBfnBLvA71Sp92ejS71TNFYcR09rMT8d86E9TrLHMApRXf1of8UyKkmlIJkCJytGZOITCnOaFF2FaQcPaRh96DlogAILPpHUdb+2Pm2eCfFbzrTUUq7S32XMIZYkh7wMS26pg5+3B+ak7ronslO1rkvWw2i4EwXES4SRqPW8baeDfZgeb1BF6y2t920bMSIGQN1kLNpe5jozNgC4P86 X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(376014)(7416014)(1800799024)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2024 15:13:59.0067 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 08e297bd-0fd1-4561-eaf6-08dc99e06ed5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE38.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7938 SDHCI vendor tuning registers are configured using config setting framework. Add reference to SDHCI controllers config settings. Signed-off-by: Krishna Yarlagadda --- .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml index 72987f0326a1..39bda6ce1e50 100644 --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml @@ -88,6 +88,10 @@ properties: items: - description: phandle to the core power domain + config-settings: + description: phandle to the sdhci configuration settings + $ref: /schemas/types.yaml#/definitions/phandle + nvidia,default-tap: description: Specify the default inbound sampling clock trimmer value for non-tunable modes.