From patchwork Wed Oct 23 09:27:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuanjie Yang X-Patchwork-Id: 13846811 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46912145323; Wed, 23 Oct 2024 09:28:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729675691; cv=none; b=ShweOX9RTnuSPy389yAmQ35sO+tPD/9EawkMFM3Bbt9c8OxPgjnB3OU2oCaglzV6aym5i7qEsRq72nCmZMQRDckl0plJtj0/dCagwhP9qxc+LbaL45xEGuL6jN7Eq6rlfUByIMeWtmlv7By2MBvaDLB50nBC4zbp7pzVatV63rI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729675691; c=relaxed/simple; bh=3uGqvu1Ej5ubfR28oRtrKkgKiPTsTNphLMCiEe3h7cU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NeMeo0SR2HbhQGfkoL2ei2d+xwdatrNYpu06bWIz3zto7QPcgxPrxDS7SgyQgcMSE33V4BM/R/iI9cfEjdHvruHAe8+1w3V86EJiRzX6C78+0nAfrkyPOtDFNELk/j6LaawkG3MbtdnIBfCnGyLF6GQzQBdRlc51VtNoJ8cPtdU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=bHQ2gViK; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="bHQ2gViK" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49MLa12E032117; Wed, 23 Oct 2024 09:28:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=0zcOS3vwAB9 86vCIVBrctvyeC9FGKnHLF6qnxLRHULw=; b=bHQ2gViKAwOLV856D++W9VzIrcn 9C5+oX/8XDgwcL5y6VOZZ/iaiXv1r00pYjUA05JBkG8cl8E/ASImq+BK1kFXSWmV aM1ylwE0dkLmfWxFaiUrulYG8mLdH4U1dCVWG5CK1/LZICszYgg03w2DueImF+TQ lgBXy1FqLc1I/ccNwlmgyiudvH2rIYrZlVtrT/J47vPd3Mx+R8smfkP9ve3FTlFL d9hn0BdxfzfG3z+5SZvQAUXhr7z7PUPai6UK8rU0MxNZ25D7Mhdkcf5PtwLM3oWo XZZsQOM1eUZtd6pkJb/kesN4fhC3H8L6n8QokN0e4lt0IZgt3Ji0WI0pcBA== Received: from aptaippmta01.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com [103.229.16.4]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 42em3vsnv5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Oct 2024 09:28:05 +0000 (GMT) Received: from pps.filterd (APTAIPPMTA01.qualcomm.com [127.0.0.1]) by APTAIPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 49N9S4sm006099; Wed, 23 Oct 2024 09:28:04 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APTAIPPMTA01.qualcomm.com (PPS) with ESMTPS id 42cqceqjjk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Oct 2024 09:28:04 +0000 Received: from APTAIPPMTA01.qualcomm.com (APTAIPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 49N9S3Ce006094; Wed, 23 Oct 2024 09:28:03 GMT Received: from cse-cd02-lnx.ap.qualcomm.com (cse-cd02-lnx.qualcomm.com [10.64.75.246]) by APTAIPPMTA01.qualcomm.com (PPS) with ESMTPS id 49N9S2fO006075 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Oct 2024 09:28:03 +0000 Received: by cse-cd02-lnx.ap.qualcomm.com (Postfix, from userid 4571896) id 836F9137E; Wed, 23 Oct 2024 17:28:01 +0800 (CST) From: Yuanjie Yang To: ulf.hansson@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, bhupesh.sharma@linaro.org, andersson@kernel.org, konradybcio@kernel.org Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_tingweiz@quicinc.com, Yuanjie Yang Subject: [PATCH v1 3/3] arm64: dts: qcom: qcs615-ride: Enable SD and emmc node Date: Wed, 23 Oct 2024 17:27:08 +0800 Message-Id: <20241023092708.604195-4-quic_yuanjiey@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241023092708.604195-1-quic_yuanjiey@quicinc.com> References: <20241023092708.604195-1-quic_yuanjiey@quicinc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: nCk8um1MtyLi1fI16ZGRkuSwJTkjvyOd X-Proofpoint-ORIG-GUID: nCk8um1MtyLi1fI16ZGRkuSwJTkjvyOd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 malwarescore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxlogscore=946 priorityscore=1501 mlxscore=0 suspectscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410230058 Enable SD and emmc on the Qualcomm QCS615 Ride platform. Signed-off-by: Yuanjie Yang --- arch/arm64/boot/dts/qcom/qcs615-ride.dts | 31 ++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts index 4ef969a6af15..7a5d0a3e725c 100644 --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts @@ -5,6 +5,7 @@ /dts-v1/; #include +#include #include "qcs615.dtsi" / { model = "Qualcomm Technologies, Inc. QCS615 Ride"; @@ -12,6 +13,8 @@ / { chassis-type = "embedded"; aliases { + mmc0 = &sdhc_1; + mmc1 = &sdhc_2; serial0 = &uart0; }; @@ -213,6 +216,34 @@ &rpmhcc { clocks = <&xo_board_clk>; }; +&sdhc_1 { + pinctrl-0 = <&sdc1_state_on>; + pinctrl-1 = <&sdc1_state_off>; + pinctrl-names = "default", "sleep"; + + vmmc-supply = <&vreg_l17a>; + vqmmc-supply = <&vreg_s4a>; + + non-removable; + no-sd; + no-sdio; + + status = "okay"; +}; + +&sdhc_2 { + pinctrl-0 = <&sdc2_state_on>; + pinctrl-1 = <&sdc2_state_off>; + pinctrl-names = "default", "sleep"; + + cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vreg_l10a>; + vqmmc-supply = <&vreg_l2a>; + + status = "okay"; +}; + &uart0 { status = "okay"; };