From patchwork Mon Oct 28 06:05:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sricharan Ramabadhran X-Patchwork-Id: 13853055 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43BB018FC91; Mon, 28 Oct 2024 06:06:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730095579; cv=none; b=Dmm3NQTA+hloHUJH2rawWS/Xx54t/vB/UXh5zBJxRksAo1EwwYz0/CUALAC77zwGVCGrsimA427s7THXklHH/qK4GdpocXaqlQzy9/vEP1IkGOyr9GR0Px3HcuXhKJw7Yg6Q0qLxID4Vv5C/cn+bWuXYFKZIIcTxM+hmP06N95M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730095579; c=relaxed/simple; bh=zEIdGI1WfN7+87Qwk3QhTf9fFqv5U70WkwrRh7DZz1w=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eAQXTO6hLBfcockJWIOjNZzai1g7vkazX0TMBJTYwRYOxWerWqYx/BBX/HX8RipjyyWbiJIFe117i5Tx4kTdK7DTLJ+S8FUirO93XY7PuJBUB3/YlBHtovWVBaiM4jgkM3tgvt4e3Svyr1KS91ocgcfiKdpYzQ3vdfut1XWdLFI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=eple8LOL; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="eple8LOL" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49RNo5vl027417; Mon, 28 Oct 2024 06:06:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= fbkTba5solSzraoPqiXavV2Uo/rEdmyrwBlp9es7N4U=; b=eple8LOLdoU2s3mK TQqrb4f8N+s8ffZ6gecL03Ud1CY/t1Lp0a9xypkpG0ldCZI4ZYoI9Ohw4MaSPbcs 2o70S+G7otIqeIWFzyzZ8GFIHYp9hFsKZrRq1s3G9uF6xed8Pf9wJJSdeekLay6/ 1LVfWEn8oxN++7KFYErWEAQNOw1Ws/lR8A+fCTidLwc3hQpfd0YW9M/C4IkaxWQ/ JbKA6Pgar4P+W7JmBMW53yL9pEnRP6gSJWf7r/ZuXO1aeYxjqClVZ2+8AgfMSZ9O FyDpRpj10TxRSkyRqEVuvrub5enzMWwkHFCZW+RyJm4ML8yfMftJMu0rPWzIXgOa 886JQQ== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 42gr0x3sb6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2024 06:06:05 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49S6649f003359 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2024 06:06:04 GMT Received: from hu-srichara-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sun, 27 Oct 2024 23:05:58 -0700 From: Sricharan R To: , , , , , , , , , , , , , , , , , , , , CC: , Subject: [PATCH V5 6/6] arm64: defconfig: Enable IPQ5424 RDP466 base configs Date: Mon, 28 Oct 2024 11:35:06 +0530 Message-ID: <20241028060506.246606-7-quic_srichara@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241028060506.246606-1-quic_srichara@quicinc.com> References: <20241028060506.246606-1-quic_srichara@quicinc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: beeTx0Bfp0RbDcPZBKOEJbG7bB0yiVKY X-Proofpoint-GUID: beeTx0Bfp0RbDcPZBKOEJbG7bB0yiVKY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 suspectscore=0 clxscore=1015 bulkscore=0 adultscore=0 impostorscore=0 mlxscore=0 malwarescore=0 mlxlogscore=751 priorityscore=1501 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410280050 From: Sricharan Ramabadhran Enable GCC, Pinctrl for Qualcomm's IPQ5424 SoC which is required to boot IPQ5424-RDP466 boards to a console shell. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sricharan Ramabadhran --- Added reviewed by tag arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 36b33b9f1704..6b7f5f1a3a87 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -596,6 +596,7 @@ CONFIG_PINCTRL_IMX93=y CONFIG_PINCTRL_MSM=y CONFIG_PINCTRL_IPQ5018=y CONFIG_PINCTRL_IPQ5332=y +CONFIG_PINCTRL_IPQ5424=y CONFIG_PINCTRL_IPQ8074=y CONFIG_PINCTRL_IPQ6018=y CONFIG_PINCTRL_IPQ9574=y @@ -1310,6 +1311,7 @@ CONFIG_IPQ_APSS_6018=y CONFIG_IPQ_APSS_5018=y CONFIG_IPQ_GCC_5018=y CONFIG_IPQ_GCC_5332=y +CONFIG_IPQ_GCC_5424=y CONFIG_IPQ_GCC_6018=y CONFIG_IPQ_GCC_8074=y CONFIG_IPQ_GCC_9574=y