| Message ID | 49807409-2DDA-4C6D-AD98-ECDEF8B3B633@marvell.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Philip, On Fri, Jan 21 2011, Philip Rakity wrote: > Marvell pxa controllers have private registers that may need to be > modified before and after a reset is done. > > For example, the SD reset > operation, RESET_ALL, will reset the private registers to their > default state. This will cause the clock adjustment registers that > may have been programmed to have incorrect values. > > RESET_DATA sometimes needs to be delayed before the reset is done > (depending on SoC) to enable any transactions being handled by the > SDIO card to be completed. Needed in pre SD 3.0 silicon to handle > clock gating. > > Implement hooks to allow this to happen. > > Signed-off-by: Philip Rakity <prakity@marvell.com> > --- > drivers/mmc/host/sdhci.c | 6 ++++++ > drivers/mmc/host/sdhci.h | 2 ++ > 2 files changed, 8 insertions(+), 0 deletions(-) > > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c > index d5febe5..f439881 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -157,6 +157,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) > if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) > ier = sdhci_readl(host, SDHCI_INT_ENABLE); > > + if (host->ops->platform_reset_enter) > + host->ops->platform_reset_enter(host, mask); > + > sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); > > if (mask & SDHCI_RESET_ALL) > @@ -177,6 +180,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) > mdelay(1); > } > > + if (host->ops->platform_reset_exit) > + host->ops->platform_reset_exit(host, mask); > + > if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) > sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); > } > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h > index 6e0969e..9dd7bc1 100644 > --- a/drivers/mmc/host/sdhci.h > +++ b/drivers/mmc/host/sdhci.h > @@ -222,6 +222,8 @@ struct sdhci_ops { > void (*platform_send_init_74_clocks)(struct sdhci_host *host, > u8 power_mode); > unsigned int (*get_ro)(struct sdhci_host *host); > + void (*platform_reset_enter)(struct sdhci_host *host, u8 mask); > + void (*platform_reset_exit)(struct sdhci_host *host, u8 mask); > }; > > #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS Thanks, pushed to mmc-next for .40. - Chris.
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index d5febe5..f439881 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -157,6 +157,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) ier = sdhci_readl(host, SDHCI_INT_ENABLE); + if (host->ops->platform_reset_enter) + host->ops->platform_reset_enter(host, mask); + sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); if (mask & SDHCI_RESET_ALL) @@ -177,6 +180,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) mdelay(1); } + if (host->ops->platform_reset_exit) + host->ops->platform_reset_exit(host, mask); + if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 6e0969e..9dd7bc1 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -222,6 +222,8 @@ struct sdhci_ops { void (*platform_send_init_74_clocks)(struct sdhci_host *host, u8 power_mode); unsigned int (*get_ro)(struct sdhci_host *host); + void (*platform_reset_enter)(struct sdhci_host *host, u8 mask); + void (*platform_reset_exit)(struct sdhci_host *host, u8 mask); }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS