From patchwork Thu Jan 26 09:06:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 9538579 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2418C601D7 for ; Thu, 26 Jan 2017 09:11:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1520D1FF8F for ; Thu, 26 Jan 2017 09:11:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 09A26281C3; Thu, 26 Jan 2017 09:11:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E78F128174 for ; Thu, 26 Jan 2017 09:11:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753279AbdAZJKL (ORCPT ); Thu, 26 Jan 2017 04:10:11 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:45965 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753107AbdAZJGK (ORCPT ); Thu, 26 Jan 2017 04:06:10 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id D8BB020D9A; Thu, 26 Jan 2017 10:06:12 +0100 (CET) Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id B1903206DB; Thu, 26 Jan 2017 10:06:12 +0100 (CET) From: Maxime Ripard To: Chen-Yu Tsai , Maxime Ripard , Ulf Hansson Cc: Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, Andre Przywara Subject: [PATCH v4 12/13] arm64: allwinner: a64: add UART1 pin nodes Date: Thu, 26 Jan 2017 10:06:05 +0100 Message-Id: <4c3bab1dc2b6d900b4bab76181a08eae8a27a785.1485421557.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Andre Przywara On many boards UART1 connects to a Bluetooth chip, so add the pinctrl nodes for the only pins providing access to that UART. That includes those pins for hardware flow control (RTS/CTS). Signed-off-by: Andre Przywara Signed-off-by: Maxime Ripard --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index cb3e0cf2191a..d27b17f807d0 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -276,6 +276,16 @@ pins = "PB8", "PB9"; function = "uart0"; }; + + uart1_pins: uart1_pins { + pins = "PG6", "PG7"; + function = "uart1"; + }; + + uart1_rts_cts_pins: uart1_rts_cts_pins { + pins = "PG8", "PG9"; + function = "uart1"; + }; }; uart0: serial@1c28000 {