From patchwork Wed Feb 17 13:19:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 8338661 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3748BC0553 for ; Wed, 17 Feb 2016 13:19:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2DECA20392 for ; Wed, 17 Feb 2016 13:19:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 174CB20272 for ; Wed, 17 Feb 2016 13:19:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161651AbcBQNTw (ORCPT ); Wed, 17 Feb 2016 08:19:52 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:4753 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161647AbcBQNTv (ORCPT ); Wed, 17 Feb 2016 08:19:51 -0500 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Wed, 17 Feb 2016 05:19:23 -0800 Received: from HQMAIL105.nvidia.com ([172.20.187.12]) by hqnvupgp07.nvidia.com (PGP Universal service); Wed, 17 Feb 2016 05:18:51 -0800 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 17 Feb 2016 05:18:51 -0800 Received: from UKMAIL101.nvidia.com (10.26.138.13) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 17 Feb 2016 13:19:42 +0000 Received: from [10.21.132.159] (10.21.132.159) by UKMAIL101.nvidia.com (10.26.138.13) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 17 Feb 2016 13:19:38 +0000 Subject: Re: [PATCH v2 0/5] Tegra SDHCI UHS-I support To: Lucas Stach , Ulf Hansson References: <1450809664-11360-1-git-send-email-dev@lynxeye.de> CC: Stephen Warren , Thierry Reding , Alexandre Courbot , , From: Jon Hunter Message-ID: <56C47368.4010304@nvidia.com> Date: Wed, 17 Feb 2016 13:19:36 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <1450809664-11360-1-git-send-email-dev@lynxeye.de> X-Originating-IP: [10.21.132.159] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL101.nvidia.com (10.26.138.13) Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Lucas, On 22/12/15 18:40, Lucas Stach wrote: > Hi all, > > this series implements UHS-I signaling for the Tegra SDHCI host, > which mainly means putting a proper tuning sequence in place. > > I've tested this on Jetson TK1 and got the following speed results, > where mmcblk0 is the on-board eMMC and mmcblk1 is a micro SDXC card: > > Without series applied: > hdparm -t /dev/mmcblk0 > Timing buffered disk reads: 110 MB in 3.05 seconds = 36.02 MB/sec > hdparm -t /dev/mmcblk1 > Timing buffered disk reads: 56 MB in 3.01 seconds = 18.63 MB/sec > > With series applied: > hdparm -t /dev/mmcblk0 > Timing buffered disk reads: 236 MB in 3.00 seconds = 78.58 MB/sec > hdparm -t /dev/mmcblk1 > Timing buffered disk reads: 102 MB in 3.04 seconds = 33.51 MB/sec > > Tegra 30 does support UHS-I speeds too, but currently has problems > when lowering the card voltage, which is needed in order to switch > to UHS-I signaling. I have some more patches to fix this, but they > need a bit more cleanup, with them applied the gains on Tegra30 are > similar to the results above. > > For now the gains are limited to Tegra124+, with no regressions on > Tegra30 and Tegra20. > > V2 fixes some minor style problems and is rebased on top of mmc/next. > This means it enables the same tuning logic on Tegra210 also. I > don't have a way to test this myself, so any testing on Tegra210 much > appreciated. I have recently noticed that on my tegra114-dalmore-a04, SD cards are no longer recognised on boot. It appears that the problem started after this series was merged. On tegra114 I see: [ 1.777006] mmc0: error -110 whilst initialising SD card If I disable the UHS-I changes then it works again (see below). I am guessing you don't have a tegra114 board to test on? I have not had time to look into this further, but I am not sure if we should disable UHS-I on tegra114 for now? Cheers Jon clk_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); @@ -315,6 +321,32 @@ static const struct sdhci_ops tegra114_sdhci_ops = { .write_w = tegra_sdhci_writew, .write_l = tegra_sdhci_writel, .set_clock = tegra_sdhci_set_clock, + .set_bus_width = sdhci_set_bus_width, + .reset = tegra_sdhci_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, + .get_max_clock = sdhci_pltfm_clk_get_max_clock, +}; + +static const struct sdhci_pltfm_data sdhci_tegra114_pdata = { + .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | + SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | + SDHCI_QUIRK_SINGLE_POWER_WRITE | + SDHCI_QUIRK_NO_HISPD_BIT | + SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC | + SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, + .ops = &tegra114_sdhci_ops, +}; + +static const struct sdhci_tegra_soc_data soc_data_tegra114 = { + .pdata = &sdhci_tegra114_pdata, +}; + +static const struct sdhci_ops tegra124_sdhci_ops = { + .get_ro = tegra_sdhci_get_ro, + .read_w = tegra_sdhci_readw, + .write_w = tegra_sdhci_writew, + .write_l = tegra_sdhci_writel, + .set_clock = tegra_sdhci_set_clock, .set_bus_width = tegra_sdhci_set_bus_width, .reset = tegra_sdhci_reset, .platform_execute_tuning = tegra_sdhci_execute_tuning, @@ -322,7 +354,7 @@ static const struct sdhci_ops tegra114_sdhci_ops = { .get_max_clock = tegra_sdhci_get_max_clock, }; -static const struct sdhci_pltfm_data sdhci_tegra114_pdata = { +static const struct sdhci_pltfm_data sdhci_tegra124_pdata = { .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | SDHCI_QUIRK_SINGLE_POWER_WRITE | @@ -330,11 +362,11 @@ static const struct sdhci_pltfm_data sdhci_tegra114_pdata = { SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, - .ops = &tegra114_sdhci_ops, + .ops = &tegra124_sdhci_ops, --- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 83c4bf7bc16c..bc7a0847e316 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -147,10 +147,16 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) /* Advertise UHS modes as supported by host */ if (soc_data->nvquirks & NVQUIRK_ENABLE_SDR50) misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDR50; + else + misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_SDR50; if (soc_data->nvquirks & NVQUIRK_ENABLE_DDR50) misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_DDR50; + else + misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_DDR50; if (soc_data->nvquirks & NVQUIRK_ENABLE_SDR104) misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDR104; + else + misc_ctrl &= ~SDHCI_MISC_CTRL_ENABLE_SDR104; sdhci_writel(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL);