From patchwork Fri May 27 02:41:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: ziyuan X-Patchwork-Id: 9137565 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0C89960467 for ; Fri, 27 May 2016 02:41:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F3FC8279C4 for ; Fri, 27 May 2016 02:41:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E8F322807E; Fri, 27 May 2016 02:41:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 85651279C4 for ; Fri, 27 May 2016 02:41:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932230AbcE0Clj (ORCPT ); Thu, 26 May 2016 22:41:39 -0400 Received: from regular1.263xmail.com ([211.150.99.140]:51359 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932181AbcE0Cli (ORCPT ); Thu, 26 May 2016 22:41:38 -0400 Received: from xzy.xu?rock-chips.com (unknown [192.168.167.233]) by regular1.263xmail.com (Postfix) with SMTP id 70C104C8E; Fri, 27 May 2016 10:41:27 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from [172.16.22.176] (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 01E193CCB; Fri, 27 May 2016 10:41:18 +0800 (CST) X-RL-SENDER: xzy.xu@rock-chips.com X-FST-TO: linux-rockchip@lists.infradead.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: xzy.xu@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: xzy.xu@rock-chips.com X-DNS-TYPE: 0 Received: from [172.16.22.176] (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith ESMTP id 211269X9YN9; Fri, 27 May 2016 10:41:25 +0800 (CST) Message-ID: <5747B3CD.9080102@rock-chips.com> Date: Fri, 27 May 2016 10:41:17 +0800 From: Ziyuan Xu User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Adrian Hunter CC: ulf.hansson@linaro.org, shawn.lin@rock-chips.com, dianders@chromium.org, linux-mmc@vger.kernel.org, xzy.xu@rock-chips.com, linux-rockchip@lists.infradead.org Subject: Re: [PATCH] mmc: mmc: Fix HS switch failure in mmc_select_hs400() References: <1464241832-10322-1-git-send-email-xzy.xu@rock-chips.com> <5746BC9D.9050501@intel.com> In-Reply-To: <5746BC9D.9050501@intel.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 2016年05月26日 17:06, Adrian Hunter wrote: > On 26/05/16 08:50, Ziyuan Xu wrote: >> To slove the issue which was found on gru board for hs400. >> >> [ 4.616946] sdhci: Secure Digital Host Controller Interface driver >> [ 4.623135] sdhci: Copyright(c) Pierre Ossman >> [ 4.722575] sdhci-pltfm: SDHCI platform and OF driver helper >> [ 4.730962] sdhci-arasan fe330000.sdhci: No vmmc regulator found >> [ 4.737444] sdhci-arasan fe330000.sdhci: No vqmmc regulator found >> [ 4.774930] mmc0: SDHCI controller on fe330000.sdhci [fe330000.sdhci] using ADMA >> [ 4.980295] mmc0: switch to high-speed from hs200 failed, err:-84 >> [ 4.986487] mmc0: error -84 whilst initialising MMC card >> >> We should change HS400 mode selection timing to meet JEDEC >> specification. The JEDEC 5.1 said that change the frequency to <= 52MHZ >> after HS_TIMING switch. Refer to section 6.6.2.3 "HS400" timing mode >> selection: >> Set the "Timing Interface" parameter in the HS_TIMING[185] field of the >> Extended CSD register to 0x1 to switch to High Speed mode and then set >> the clock frequency to a value not greater than 52MHZ. > Do you need a fix also for re-tuning? i.e. does re-tuning work with this > patch? Or do you not need re-tuning? Do you mean that revise the similar timing in mmc_hs400_to_hs200()as shown below? The spec doesn't require mode selection from hs400 to hs200, moreover I have not yet hit any failure in mmc_hs400_to_hs200. Thus I don't know whether a fix is needed for re-tuning. By the way, what's your opinion for this patch? I know, you did it on purpose that I found some message from git log. >> Signed-off-by: Ziyuan Xu >> --- >> drivers/mmc/core/mmc.c | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c >> index b81b08f..8e4d059 100644 >> --- a/drivers/mmc/core/mmc.c >> +++ b/drivers/mmc/core/mmc.c >> @@ -1078,10 +1078,6 @@ static int mmc_select_hs400(struct mmc_card *card) >> if (host->caps & MMC_CAP_WAIT_WHILE_BUSY) >> send_status = false; >> >> - /* Reduce frequency to HS frequency */ >> - max_dtr = card->ext_csd.hs_max_dtr; >> - mmc_set_clock(host, max_dtr); >> - >> /* Switch card to HS mode */ >> val = EXT_CSD_TIMING_HS; >> err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, >> @@ -1097,6 +1093,10 @@ static int mmc_select_hs400(struct mmc_card *card) >> /* Set host controller to HS timing */ >> mmc_set_timing(card->host, MMC_TIMING_MMC_HS); >> >> + /* Reduce frequency to HS frequency */ >> + max_dtr = card->ext_csd.hs_max_dtr; >> + mmc_set_clock(host, max_dtr); >> + >> if (!send_status) { >> err = mmc_switch_status(card); >> if (err) >> > > > --- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 8e4d059..4232a42 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1161,10 +1161,6 @@ int mmc_hs400_to_hs200(struct mmc_card *card) if (host->caps & MMC_CAP_WAIT_WHILE_BUSY) send_status = false; - /* Reduce frequency to HS */ - max_dtr = card->ext_csd.hs_max_dtr; - mmc_set_clock(host, max_dtr); - /* Switch HS400 to HS DDR */ val = EXT_CSD_TIMING_HS; err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, @@ -1175,6 +1171,10 @@ int mmc_hs400_to_hs200(struct mmc_card *card) mmc_set_timing(host, MMC_TIMING_MMC_DDR52); + /* Reduce frequency to HS */ + max_dtr = card->ext_csd.hs_max_dtr; + mmc_set_clock(host, max_dtr); + if (!send_status) { err = mmc_switch_status(card); if (err)