[1/5] arm: mach-mmp: SDH register definitions for (pxa168, pxa910, mmp2)

Commit Message

Philip Rakity Feb. 14, 2011, 6:49 a.m. UTC

None

Patch

diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
index f7011ef..9d1146f 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apmu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -20,15 +20,25 @@ 
 #define APMU_IRE	APMU_REG(0x048)
 #define APMU_LCD	APMU_REG(0x04c)
 #define APMU_CCIC	APMU_REG(0x050)
-#define APMU_SDH0	APMU_REG(0x054)
-#define APMU_SDH1	APMU_REG(0x058)
 #define APMU_USB	APMU_REG(0x05c)
 #define APMU_NAND	APMU_REG(0x060)
 #define APMU_DMA	APMU_REG(0x064)
 #define APMU_GEU	APMU_REG(0x068)
 #define APMU_BUS	APMU_REG(0x06c)
-#define APMU_SDH2	APMU_REG(0x0e8)
-#define APMU_SDH3	APMU_REG(0x0ec)
+
+#define APMU_PXA168_SDH0	APMU_REG(0x054)
+#define APMU_PXA168_SDH1	APMU_REG(0x058)
+#define APMU_PXA168_SDH2	APMU_REG(0x0e0)
+#define APMU_PXA168_SDH3	APMU_REG(0x0e4)
+
+#define APMU_PXA910_SDH0	APMU_REG(0x054)
+#define APMU_PXA910_SDH1	APMU_REG(0x058)
+#define APMU_PXA910_SDH2	APMU_REG(0x0e0)
+
+#define APMU_MMP2_SDH0	APMU_REG(0x054)
+#define APMU_MMP2_SDH1	APMU_REG(0x058)
+#define APMU_MMP2_SDH2	APMU_REG(0x0e8)
+#define APMU_MMP2_SDH3	APMU_REG(0x0ec)
 
 #define APMU_FNCLK_EN	(1 << 4)
 #define APMU_AXICLK_EN	(1 << 3)