From patchwork Thu Nov 7 03:57:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 11231833 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF1EC112B for ; Thu, 7 Nov 2019 04:11:54 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 95C0F222D1 for ; Thu, 7 Nov 2019 04:11:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 95C0F222D1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from new-ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 2F3B1100DC2B6; Wed, 6 Nov 2019 20:14:24 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=192.55.52.115; helo=mga14.intel.com; envelope-from=dan.j.williams@intel.com; receiver= Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3DD5E100DC2A6 for ; Wed, 6 Nov 2019 20:14:22 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 20:11:52 -0800 X-IronPort-AV: E=Sophos;i="5.68,276,1569308400"; d="scan'208";a="227707120" Received: from dwillia2-desk3.jf.intel.com (HELO dwillia2-desk3.amr.corp.intel.com) ([10.54.39.16]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 20:11:52 -0800 Subject: [PATCH 11/16] libnvdimm: Simplify root read-only definition for the 'resource' attribute From: Dan Williams To: linux-nvdimm@lists.01.org Date: Wed, 06 Nov 2019 19:57:35 -0800 Message-ID: <157309905534.1582359.13927459228885931097.stgit@dwillia2-desk3.amr.corp.intel.com> In-Reply-To: <157309899529.1582359.15358067933360719580.stgit@dwillia2-desk3.amr.corp.intel.com> References: <157309899529.1582359.15358067933360719580.stgit@dwillia2-desk3.amr.corp.intel.com> User-Agent: StGit/0.18-2-gc94f MIME-Version: 1.0 Message-ID-Hash: SF2UVA4R5S3P6MYD6NCY6PQZFD5AGBEC X-Message-ID-Hash: SF2UVA4R5S3P6MYD6NCY6PQZFD5AGBEC X-MailFrom: dan.j.williams@intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; suspicious-header CC: peterz@infradead.org, dave.hansen@linux.intel.com, linux-kernel@vger.kernel.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: Rather than update the permission in ->is_visible() set the permission directly at declaration time. Cc: Ira Weiny Cc: Vishal Verma Signed-off-by: Dan Williams Reviewed-by: Aneesh Kumar K.V --- drivers/nvdimm/namespace_devs.c | 9 +++------ drivers/nvdimm/pfn_devs.c | 10 +--------- drivers/nvdimm/region_devs.c | 10 +++------- 3 files changed, 7 insertions(+), 22 deletions(-) diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_devs.c index 37471a272c1a..85b553094d19 100644 --- a/drivers/nvdimm/namespace_devs.c +++ b/drivers/nvdimm/namespace_devs.c @@ -1303,7 +1303,7 @@ static ssize_t resource_show(struct device *dev, return -ENXIO; return sprintf(buf, "%#llx\n", (unsigned long long) res->start); } -static DEVICE_ATTR_RO(resource); +static DEVICE_ATTR(resource, 0400, resource_show, NULL); static const unsigned long blk_lbasize_supported[] = { 512, 520, 528, 4096, 4104, 4160, 4224, 0 }; @@ -1619,11 +1619,8 @@ static umode_t namespace_visible(struct kobject *kobj, { struct device *dev = container_of(kobj, struct device, kobj); - if (a == &dev_attr_resource.attr) { - if (is_namespace_blk(dev)) - return 0; - return 0400; - } + if (a == &dev_attr_resource.attr && is_namespace_blk(dev)) + return 0; if (is_namespace_pmem(dev) || is_namespace_blk(dev)) { if (a == &dev_attr_size.attr) diff --git a/drivers/nvdimm/pfn_devs.c b/drivers/nvdimm/pfn_devs.c index e809961e2b6f..9f9cb51301e7 100644 --- a/drivers/nvdimm/pfn_devs.c +++ b/drivers/nvdimm/pfn_devs.c @@ -218,7 +218,7 @@ static ssize_t resource_show(struct device *dev, return rc; } -static DEVICE_ATTR_RO(resource); +static DEVICE_ATTR(resource, 0400, resource_show, NULL); static ssize_t size_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -269,16 +269,8 @@ static struct attribute *nd_pfn_attributes[] = { NULL, }; -static umode_t pfn_visible(struct kobject *kobj, struct attribute *a, int n) -{ - if (a == &dev_attr_resource.attr) - return 0400; - return a->mode; -} - static struct attribute_group nd_pfn_attribute_group = { .attrs = nd_pfn_attributes, - .is_visible = pfn_visible, }; const struct attribute_group *nd_pfn_attribute_groups[] = { diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c index 0afc1973e938..be3e429e86af 100644 --- a/drivers/nvdimm/region_devs.c +++ b/drivers/nvdimm/region_devs.c @@ -553,7 +553,7 @@ static ssize_t resource_show(struct device *dev, return sprintf(buf, "%#llx\n", nd_region->ndr_start); } -static DEVICE_ATTR_RO(resource); +static DEVICE_ATTR(resource, 0400, resource_show, NULL); static ssize_t persistence_domain_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -605,12 +605,8 @@ static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n) if (!is_memory(dev) && a == &dev_attr_badblocks.attr) return 0; - if (a == &dev_attr_resource.attr) { - if (is_memory(dev)) - return 0400; - else - return 0; - } + if (a == &dev_attr_resource.attr && !is_memory(dev)) + return 0; if (a == &dev_attr_deep_flush.attr) { int has_flush = nvdimm_has_flush(nd_region);