From patchwork Thu Jun 11 21:19:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 6592671 Return-Path: X-Original-To: patchwork-linux-nvdimm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E4372C0020 for ; Thu, 11 Jun 2015 21:22:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 681E42065A for ; Thu, 11 Jun 2015 21:22:14 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 00E1F2065D for ; Thu, 11 Jun 2015 21:22:13 +0000 (UTC) Received: from ml01.vlan14.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E69621828DE; Thu, 11 Jun 2015 14:22:12 -0700 (PDT) X-Original-To: linux-nvdimm@lists.01.org Delivered-To: linux-nvdimm@lists.01.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by ml01.01.org (Postfix) with ESMTP id 8C8311828D7 for ; Thu, 11 Jun 2015 14:22:11 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP; 11 Jun 2015 14:22:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,597,1427785200"; d="scan'208";a="506894907" Received: from dwillia2-desk3.jf.intel.com (HELO dwillia2-desk3.amr.corp.intel.com) ([10.23.232.36]) by FMSMGA003.fm.intel.com with ESMTP; 11 Jun 2015 14:22:12 -0700 Subject: [PATCH v4 3/6] arch/*/asm/io.h: add ioremap_cache() to all architectures From: Dan Williams To: arnd@arndb.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, tglx@linutronix.de, ross.zwisler@linux.intel.com, akpm@linux-foundation.org Date: Thu, 11 Jun 2015 17:19:30 -0400 Message-ID: <20150611211930.10271.9100.stgit@dwillia2-desk3.amr.corp.intel.com> In-Reply-To: <20150611211354.10271.57950.stgit@dwillia2-desk3.amr.corp.intel.com> References: <20150611211354.10271.57950.stgit@dwillia2-desk3.amr.corp.intel.com> User-Agent: StGit/0.17.1-8-g92dd MIME-Version: 1.0 Cc: jgross@suse.com, konrad.wilk@oracle.com, linux-nvdimm@lists.01.org, benh@kernel.crashing.org, mcgrof@suse.com, x86@kernel.org, linux-kernel@vger.kernel.org, stefan.bader@canonical.com, luto@amacapital.net, linux-mm@kvack.org, geert@linux-m68k.org, ralf@linux-mips.org, hmh@hmh.eng.br, mpe@ellerman.id.au, tj@kernel.org, paulus@samba.org, hch@lst.de X-BeenThere: linux-nvdimm@lists.01.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "Linux-nvdimm developer list." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linux-nvdimm-bounces@lists.01.org Sender: "Linux-nvdimm" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Similar to ioremap_wc() let architecture implementations optionally provide ioremap_cache(). As is, current ioremap_cache() users have architecture dependencies that prevent them from compiling on archs without ioremap_cache(). In some cases the architectures that have a cached ioremap() capability have an identifier other than "ioremap_cache". Allow drivers to compile with ioremap_cache() support and fallback to a safe / uncached ioremap otherwise. Cc: Toshi Kani Signed-off-by: Dan Williams --- arch/arc/include/asm/io.h | 1 + arch/arm/include/asm/io.h | 2 ++ arch/arm64/include/asm/io.h | 3 +++ arch/avr32/include/asm/io.h | 1 + arch/frv/include/asm/io.h | 6 ++++++ arch/ia64/include/asm/io.h | 5 ----- arch/m32r/include/asm/io.h | 1 + arch/m68k/include/asm/io_mm.h | 7 +++++++ arch/m68k/include/asm/io_no.h | 5 +++++ arch/metag/include/asm/io.h | 5 +++++ arch/microblaze/include/asm/io.h | 1 + arch/mips/include/asm/io.h | 17 +++++++++++++---- arch/mn10300/include/asm/io.h | 1 + arch/nios2/include/asm/io.h | 1 + arch/s390/include/asm/io.h | 1 + arch/sparc/include/asm/io_32.h | 1 + arch/sparc/include/asm/io_64.h | 1 + arch/tile/include/asm/io.h | 1 + arch/x86/include/asm/io.h | 1 + arch/xtensa/include/asm/io.h | 3 +++ include/asm-generic/io.h | 8 ++++++++ include/asm-generic/iomap.h | 4 ++++ 22 files changed, 67 insertions(+), 9 deletions(-) diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h index 7cc4ced5dbf4..6b6f5a47acec 100644 --- a/arch/arc/include/asm/io.h +++ b/arch/arc/include/asm/io.h @@ -19,6 +19,7 @@ extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size, extern void iounmap(const void __iomem *addr); #define ioremap_nocache(phy, sz) ioremap(phy, sz) +#define ioremap_cache(phy, sz) ioremap(phy, sz) #define ioremap_wc(phy, sz) ioremap(phy, sz) #define ioremap_wt(phy, sz) ioremap(phy, sz) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 1b7677d1e5e1..5e2c5cbdffdc 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -23,6 +23,8 @@ #ifdef __KERNEL__ +#define ARCH_HAS_IOREMAP_CACHE + #include #include #include diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 7116d3973058..6a8836c9d993 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -21,6 +21,8 @@ #ifdef __KERNEL__ +#define ARCH_HAS_IOREMAP_CACHE + #include #include @@ -171,6 +173,7 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size); #define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) #define ioremap_wt(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) +#define ioremap_cache ioremap_cache #define iounmap __iounmap /* diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h index e998ff5d8e1a..c6994d880dbd 100644 --- a/arch/avr32/include/asm/io.h +++ b/arch/avr32/include/asm/io.h @@ -297,6 +297,7 @@ extern void __iounmap(void __iomem *addr); #define ioremap_wc ioremap_nocache #define ioremap_wt ioremap_nocache +#define ioremap_cache ioremap_nocache #define cached(addr) P1SEGADDR(addr) #define uncached(addr) P2SEGADDR(addr) diff --git a/arch/frv/include/asm/io.h b/arch/frv/include/asm/io.h index a31b63ec4930..cd841f852af3 100644 --- a/arch/frv/include/asm/io.h +++ b/arch/frv/include/asm/io.h @@ -18,6 +18,7 @@ #ifdef __KERNEL__ #define ARCH_HAS_IOREMAP_WT +#define ARCH_HAS_IOREMAP_CACHE #include #include @@ -277,6 +278,11 @@ static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned l return __ioremap(physaddr, size, IOMAP_FULL_CACHING); } +static inline void __iomem *ioremap_cache(unsigned long physaddr, unsigned long size) +{ + return __ioremap(physaddr, size, IOMAP_FULL_CACHING); +} + #define ioremap_wc ioremap_nocache extern void iounmap(void volatile __iomem *addr); diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h index 8588ef767a44..cba265c30c3c 100644 --- a/arch/ia64/include/asm/io.h +++ b/arch/ia64/include/asm/io.h @@ -431,11 +431,6 @@ extern void __iomem * early_ioremap (unsigned long phys_addr, unsigned long size #define early_memremap(phys_addr, size) early_ioremap(phys_addr, size) extern void early_iounmap (volatile void __iomem *addr, unsigned long size); #define early_memunmap(addr, size) early_iounmap(addr, size) -static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned long size) -{ - return ioremap(phys_addr, size); -} - /* * String version of IO memory access ops: diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm/io.h index 0c3f25ee3381..f3eceeac25c8 100644 --- a/arch/m32r/include/asm/io.h +++ b/arch/m32r/include/asm/io.h @@ -67,6 +67,7 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size) extern void iounmap(volatile void __iomem *addr); #define ioremap_nocache(off,size) ioremap(off,size) +#define ioremap_cache ioremap_nocache #define ioremap_wc ioremap_nocache #define ioremap_wt ioremap_nocache diff --git a/arch/m68k/include/asm/io_mm.h b/arch/m68k/include/asm/io_mm.h index 618c85d3c786..aaf1009f2f94 100644 --- a/arch/m68k/include/asm/io_mm.h +++ b/arch/m68k/include/asm/io_mm.h @@ -21,6 +21,7 @@ #ifdef __KERNEL__ #define ARCH_HAS_IOREMAP_WT +#define ARCH_HAS_IOREMAP_CACHE #include #include @@ -478,6 +479,12 @@ static inline void __iomem *ioremap_fullcache(unsigned long physaddr, return __ioremap(physaddr, size, IOMAP_FULL_CACHING); } +static inline void __iomem *ioremap_cache(unsigned long physaddr, + unsigned long size) +{ + return __ioremap(physaddr, size, IOMAP_FULL_CACHING); +} + static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) { __builtin_memset((void __force *) addr, val, count); diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h index ad7bd40e6742..020483566b73 100644 --- a/arch/m68k/include/asm/io_no.h +++ b/arch/m68k/include/asm/io_no.h @@ -4,6 +4,7 @@ #ifdef __KERNEL__ #define ARCH_HAS_IOREMAP_WT +#define ARCH_HAS_IOREMAP_CACHE #include #include @@ -163,6 +164,10 @@ static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size { return __ioremap(physaddr, size, IOMAP_FULL_CACHING); } +static inline void *ioremap_cache(unsigned long physaddr, unsigned long size) +{ + return __ioremap(physaddr, size, IOMAP_FULL_CACHING); +} #define iounmap(addr) do { } while(0) diff --git a/arch/metag/include/asm/io.h b/arch/metag/include/asm/io.h index 9890f21eadbe..d9b2873e3ca8 100644 --- a/arch/metag/include/asm/io.h +++ b/arch/metag/include/asm/io.h @@ -1,6 +1,8 @@ #ifndef _ASM_METAG_IO_H #define _ASM_METAG_IO_H +#define ARCH_HAS_IOREMAP_CACHE + #include #include @@ -157,6 +159,9 @@ extern void __iounmap(void __iomem *addr); #define ioremap_cached(offset, size) \ __ioremap((offset), (size), _PAGE_CACHEABLE) +#define ioremap_cache(offset, size) \ + __ioremap((offset), (size), _PAGE_CACHEABLE) + #define ioremap_wc(offset, size) \ __ioremap((offset), (size), _PAGE_WR_COMBINE) diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index 39b6315db82e..986cc0c9e67f 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h @@ -43,6 +43,7 @@ extern void __iomem *ioremap(phys_addr_t address, unsigned long size); #define ioremap_fullcache(addr, size) ioremap((addr), (size)) #define ioremap_wc(addr, size) ioremap((addr), (size)) #define ioremap_wt(addr, size) ioremap((addr), (size)) +#define ioremap_cache(addr, size) ioremap((addr), (size)) #endif /* CONFIG_MMU */ diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 9e777cd42b67..6d4c3ae146a5 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -12,6 +12,8 @@ #ifndef _ASM_IO_H #define _ASM_IO_H +#define ARCH_HAS_IOREMAP_CACHE + #include #include #include @@ -232,8 +234,10 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si * address is not guaranteed to be usable directly as a virtual * address. */ -#define ioremap(offset, size) \ - __ioremap_mode((offset), (size), _CACHE_UNCACHED) +static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) +{ + return __ioremap_mode(offset, size, _CACHE_UNCACHED); +} /* * ioremap_nocache - map bus memory into CPU space @@ -254,8 +258,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si * It's useful if some control registers are in such an area and * write combining or read caching is not desirable: */ -#define ioremap_nocache(offset, size) \ - __ioremap_mode((offset), (size), _CACHE_UNCACHED) +#define ioremap_nocache ioremap /* * ioremap_cachable - map bus memory into CPU space @@ -272,8 +275,14 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si * the CPU. Also enables full write-combining. Useful for some * memory-like regions on I/O busses. */ +extern unsigned long _page_cachable_default; #define ioremap_cachable(offset, size) \ __ioremap_mode((offset), (size), _page_cachable_default) +static inline void __iomem *ioremap_cache(resource_size_t offset, + unsigned long size) +{ + return ioremap_cachable(offset, size); +} /* * These two are MIPS specific ioremap variant. ioremap_cacheable_cow diff --git a/arch/mn10300/include/asm/io.h b/arch/mn10300/include/asm/io.h index 07c5b4a3903b..dcab414f40df 100644 --- a/arch/mn10300/include/asm/io.h +++ b/arch/mn10300/include/asm/io.h @@ -283,6 +283,7 @@ static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long #define ioremap_wc ioremap_nocache #define ioremap_wt ioremap_nocache +#define ioremap_cache ioremap_nocache static inline void iounmap(void __iomem *addr) { diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h index c5a62da22cd2..367e2ea7663a 100644 --- a/arch/nios2/include/asm/io.h +++ b/arch/nios2/include/asm/io.h @@ -47,6 +47,7 @@ static inline void iounmap(void __iomem *addr) #define ioremap_wc ioremap_nocache #define ioremap_wt ioremap_nocache +#define ioremap_cache ioremap_nocache /* Pages to physical address... */ #define page_to_phys(page) virt_to_phys(page_to_virt(page)) diff --git a/arch/s390/include/asm/io.h b/arch/s390/include/asm/io.h index cb5fdf3a78fc..6824c3daa2a1 100644 --- a/arch/s390/include/asm/io.h +++ b/arch/s390/include/asm/io.h @@ -30,6 +30,7 @@ void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr); #define ioremap_nocache(addr, size) ioremap(addr, size) #define ioremap_wc ioremap_nocache #define ioremap_wt ioremap_nocache +#define ioremap_cache ioremap_nocache static inline void __iomem *ioremap(unsigned long offset, unsigned long size) { diff --git a/arch/sparc/include/asm/io_32.h b/arch/sparc/include/asm/io_32.h index 57f26c398dc9..b9a734caf57d 100644 --- a/arch/sparc/include/asm/io_32.h +++ b/arch/sparc/include/asm/io_32.h @@ -128,6 +128,7 @@ static inline void sbus_memcpy_toio(volatile void __iomem *dst, */ void __iomem *ioremap(unsigned long offset, unsigned long size); #define ioremap_nocache(X,Y) ioremap((X),(Y)) +#define ioremap_cache(X,Y) ioremap((X),(Y)) #define ioremap_wc(X,Y) ioremap((X),(Y)) #define ioremap_wt(X,Y) ioremap((X),(Y)) void iounmap(volatile void __iomem *addr); diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h index b99ae1fac174..61f5d04da892 100644 --- a/arch/sparc/include/asm/io_64.h +++ b/arch/sparc/include/asm/io_64.h @@ -401,6 +401,7 @@ static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) } #define ioremap_nocache ioremap +#define ioremap_cache ioremap #define ioremap_wc ioremap #define ioremap_wt ioremap diff --git a/arch/tile/include/asm/io.h b/arch/tile/include/asm/io.h index dc61de15c1f9..fe853a135e25 100644 --- a/arch/tile/include/asm/io.h +++ b/arch/tile/include/asm/io.h @@ -53,6 +53,7 @@ extern void iounmap(volatile void __iomem *addr); #endif #define ioremap_nocache(physaddr, size) ioremap(physaddr, size) +#define ioremap_cache(physaddr, size) ioremap(physaddr, size) #define ioremap_wc(physaddr, size) ioremap(physaddr, size) #define ioremap_wt(physaddr, size) ioremap(physaddr, size) #define ioremap_fullcache(physaddr, size) ioremap(physaddr, size) diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 83ec9b1d77cc..e9d6691ec4c5 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -36,6 +36,7 @@ #define ARCH_HAS_IOREMAP_WC #define ARCH_HAS_IOREMAP_WT +#define ARCH_HAS_IOREMAP_CACHE #include #include diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h index c39bb6e61911..f91a8a99aa29 100644 --- a/arch/xtensa/include/asm/io.h +++ b/arch/xtensa/include/asm/io.h @@ -12,6 +12,9 @@ #define _XTENSA_IO_H #ifdef __KERNEL__ + +#define ARCH_HAS_IOREMAP_CACHE + #include #include #include diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h index f56094cfdeff..a0665dfcab47 100644 --- a/include/asm-generic/io.h +++ b/include/asm-generic/io.h @@ -793,6 +793,14 @@ static inline void __iomem *ioremap_wt(phys_addr_t offset, size_t size) } #endif +#ifndef ioremap_cache +#define ioremap_cache ioremap_cache +static inline void __iomem *ioremap_cache(phys_addr_t offset, size_t size) +{ + return ioremap_nocache(offset, size); +} +#endif + #ifndef iounmap #define iounmap iounmap diff --git a/include/asm-generic/iomap.h b/include/asm-generic/iomap.h index d8f8622fa044..f0f30464cecd 100644 --- a/include/asm-generic/iomap.h +++ b/include/asm-generic/iomap.h @@ -70,6 +70,10 @@ extern void ioport_unmap(void __iomem *); #define ioremap_wt ioremap_nocache #endif +#ifndef ARCH_HAS_IOREMAP_CACHE +#define ioremap_cache ioremap_nocache +#endif + #ifdef CONFIG_PCI /* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */ struct pci_dev;