| Message ID | 20191203034655.51561-6-alastair@au1.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for OpenCAPI SCM devices | expand |
Le 03/12/2019 à 04:46, Alastair D'Silva a écrit : > From: Alastair D'Silva <alastair@d-silva.org> > > This patch adds platform support to map & release LPC memory. > > Signed-off-by: Alastair D'Silva <alastair@d-silva.org> > --- It looks ok now, thanks Acked-by: Frederic Barrat <fbarrat@linux.ibm.com> > arch/powerpc/include/asm/pnv-ocxl.h | 2 ++ > arch/powerpc/platforms/powernv/ocxl.c | 42 +++++++++++++++++++++++++++ > 2 files changed, 44 insertions(+) > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h > index 7de82647e761..f8f8ffb48aa8 100644 > --- a/arch/powerpc/include/asm/pnv-ocxl.h > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > @@ -32,5 +32,7 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) > > extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); > extern void pnv_ocxl_free_xive_irq(u32 irq); > +extern u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size); > +extern void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); > > #endif /* _ASM_PNV_OCXL_H */ > diff --git a/arch/powerpc/platforms/powernv/ocxl.c b/arch/powerpc/platforms/powernv/ocxl.c > index 8c65aacda9c8..b56a48daf48c 100644 > --- a/arch/powerpc/platforms/powernv/ocxl.c > +++ b/arch/powerpc/platforms/powernv/ocxl.c > @@ -475,6 +475,48 @@ void pnv_ocxl_spa_release(void *platform_data) > } > EXPORT_SYMBOL_GPL(pnv_ocxl_spa_release); > > +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size) > +{ > + struct pci_controller *hose = pci_bus_to_host(pdev->bus); > + struct pnv_phb *phb = hose->private_data; > + u32 bdfn = pci_dev_id(pdev); > + __be64 base_addr_be64; > + u64 base_addr; > + int rc; > + > + rc = opal_npu_mem_alloc(phb->opal_id, bdfn, size, &base_addr_be64); > + if (rc) { > + dev_warn(&pdev->dev, > + "OPAL could not allocate LPC memory, rc=%d\n", rc); > + return 0; > + } > + > + base_addr = be64_to_cpu(base_addr_be64); > + > + rc = check_hotplug_memory_addressable(base_addr >> PAGE_SHIFT, > + size >> PAGE_SHIFT); > + if (rc) > + return 0; > + > + return base_addr; > +} > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_setup); > + > +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev) > +{ > + struct pci_controller *hose = pci_bus_to_host(pdev->bus); > + struct pnv_phb *phb = hose->private_data; > + u32 bdfn = pci_dev_id(pdev); > + int rc; > + > + rc = opal_npu_mem_release(phb->opal_id, bdfn); > + if (rc) > + dev_warn(&pdev->dev, > + "OPAL reported rc=%d when releasing LPC memory\n", rc); > +} > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_release); > + > + > int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) > { > struct spa_data *data = (struct spa_data *) platform_data; >
On 3/12/19 2:46 pm, Alastair D'Silva wrote: > From: Alastair D'Silva <alastair@d-silva.org> > > This patch adds platform support to map & release LPC memory. Might want to explain what LPC is. Otherwise: Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> > > Signed-off-by: Alastair D'Silva <alastair@d-silva.org> > --- > arch/powerpc/include/asm/pnv-ocxl.h | 2 ++ > arch/powerpc/platforms/powernv/ocxl.c | 42 +++++++++++++++++++++++++++ > 2 files changed, 44 insertions(+) > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h > index 7de82647e761..f8f8ffb48aa8 100644 > --- a/arch/powerpc/include/asm/pnv-ocxl.h > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > @@ -32,5 +32,7 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) > > extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); > extern void pnv_ocxl_free_xive_irq(u32 irq); > +extern u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size); > +extern void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); nit: I don't think these need to be extern?
On Tue, 21 Jan 2020 17:46:12 +1100 Andrew Donnellan <ajd@linux.ibm.com> wrote: > On 3/12/19 2:46 pm, Alastair D'Silva wrote: > > From: Alastair D'Silva <alastair@d-silva.org> > > > > This patch adds platform support to map & release LPC memory. > > Might want to explain what LPC is. > > Otherwise: > > Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> > > > > > Signed-off-by: Alastair D'Silva <alastair@d-silva.org> > > --- > > arch/powerpc/include/asm/pnv-ocxl.h | 2 ++ > > arch/powerpc/platforms/powernv/ocxl.c | 42 +++++++++++++++++++++++++++ > > 2 files changed, 44 insertions(+) > > > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h > > index 7de82647e761..f8f8ffb48aa8 100644 > > --- a/arch/powerpc/include/asm/pnv-ocxl.h > > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > > @@ -32,5 +32,7 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) > > > > extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); > > extern void pnv_ocxl_free_xive_irq(u32 irq); > > +extern u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size); > > +extern void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); > > nit: I don't think these need to be extern? > > And even if they were, as verified by checkpatch: "extern prototypes should be avoided in .h files"
Le 03/12/2019 à 04:46, Alastair D'Silva a écrit : > From: Alastair D'Silva <alastair@d-silva.org> > > This patch adds platform support to map & release LPC memory. > > Signed-off-by: Alastair D'Silva <alastair@d-silva.org> > --- > arch/powerpc/include/asm/pnv-ocxl.h | 2 ++ > arch/powerpc/platforms/powernv/ocxl.c | 42 +++++++++++++++++++++++++++ > 2 files changed, 44 insertions(+) > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h > index 7de82647e761..f8f8ffb48aa8 100644 > --- a/arch/powerpc/include/asm/pnv-ocxl.h > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > @@ -32,5 +32,7 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) > > extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); > extern void pnv_ocxl_free_xive_irq(u32 irq); > +extern u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size); > +extern void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); > > #endif /* _ASM_PNV_OCXL_H */ > diff --git a/arch/powerpc/platforms/powernv/ocxl.c b/arch/powerpc/platforms/powernv/ocxl.c > index 8c65aacda9c8..b56a48daf48c 100644 > --- a/arch/powerpc/platforms/powernv/ocxl.c > +++ b/arch/powerpc/platforms/powernv/ocxl.c > @@ -475,6 +475,48 @@ void pnv_ocxl_spa_release(void *platform_data) > } > EXPORT_SYMBOL_GPL(pnv_ocxl_spa_release); > > +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size) > +{ > + struct pci_controller *hose = pci_bus_to_host(pdev->bus); > + struct pnv_phb *phb = hose->private_data; > + u32 bdfn = pci_dev_id(pdev); > + __be64 base_addr_be64; > + u64 base_addr; > + int rc; > + > + rc = opal_npu_mem_alloc(phb->opal_id, bdfn, size, &base_addr_be64); > + if (rc) { > + dev_warn(&pdev->dev, > + "OPAL could not allocate LPC memory, rc=%d\n", rc); > + return 0; > + } > + > + base_addr = be64_to_cpu(base_addr_be64); > + > + rc = check_hotplug_memory_addressable(base_addr >> PAGE_SHIFT, > + size >> PAGE_SHIFT); check_hotplug_memory_addressable() is only declared if CONFIG_MEMORY_HOTPLUG_SPARSE is selected. I think we also need a #ifdef here. Fred > + if (rc) > + return 0; > + > + return base_addr; > +} > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_setup); > + > +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev) > +{ > + struct pci_controller *hose = pci_bus_to_host(pdev->bus); > + struct pnv_phb *phb = hose->private_data; > + u32 bdfn = pci_dev_id(pdev); > + int rc; > + > + rc = opal_npu_mem_release(phb->opal_id, bdfn); > + if (rc) > + dev_warn(&pdev->dev, > + "OPAL reported rc=%d when releasing LPC memory\n", rc); > +} > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_release); > + > + > int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) > { > struct spa_data *data = (struct spa_data *) platform_data; >
On Fri, 2020-02-14 at 12:09 +0100, Frederic Barrat wrote: > > Le 03/12/2019 à 04:46, Alastair D'Silva a écrit : > > From: Alastair D'Silva <alastair@d-silva.org> > > > > This patch adds platform support to map & release LPC memory. > > > > Signed-off-by: Alastair D'Silva <alastair@d-silva.org> > > --- > > arch/powerpc/include/asm/pnv-ocxl.h | 2 ++ > > arch/powerpc/platforms/powernv/ocxl.c | 42 > > +++++++++++++++++++++++++++ > > 2 files changed, 44 insertions(+) > > > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h > > b/arch/powerpc/include/asm/pnv-ocxl.h > > index 7de82647e761..f8f8ffb48aa8 100644 > > --- a/arch/powerpc/include/asm/pnv-ocxl.h > > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > > @@ -32,5 +32,7 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void > > *platform_data, int pe_handle) > > > > extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); > > extern void pnv_ocxl_free_xive_irq(u32 irq); > > +extern u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 > > size); > > +extern void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); > > > > #endif /* _ASM_PNV_OCXL_H */ > > diff --git a/arch/powerpc/platforms/powernv/ocxl.c > > b/arch/powerpc/platforms/powernv/ocxl.c > > index 8c65aacda9c8..b56a48daf48c 100644 > > --- a/arch/powerpc/platforms/powernv/ocxl.c > > +++ b/arch/powerpc/platforms/powernv/ocxl.c > > @@ -475,6 +475,48 @@ void pnv_ocxl_spa_release(void *platform_data) > > } > > EXPORT_SYMBOL_GPL(pnv_ocxl_spa_release); > > > > +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size) > > +{ > > + struct pci_controller *hose = pci_bus_to_host(pdev->bus); > > + struct pnv_phb *phb = hose->private_data; > > + u32 bdfn = pci_dev_id(pdev); > > + __be64 base_addr_be64; > > + u64 base_addr; > > + int rc; > > + > > + rc = opal_npu_mem_alloc(phb->opal_id, bdfn, size, > > &base_addr_be64); > > + if (rc) { > > + dev_warn(&pdev->dev, > > + "OPAL could not allocate LPC memory, rc=%d\n", > > rc); > > + return 0; > > + } > > + > > + base_addr = be64_to_cpu(base_addr_be64); > > + > > + rc = check_hotplug_memory_addressable(base_addr >> PAGE_SHIFT, > > + size >> PAGE_SHIFT); > > check_hotplug_memory_addressable() is only declared if > CONFIG_MEMORY_HOTPLUG_SPARSE is selected. > I think we also need a #ifdef here. > Agreed. I think that since any actual use of the memory is going to be dependant on both hotplug & sparse, moving the ifdef to wrap the functions & declarations makes sense. > Fred > > > > + if (rc) > > + return 0; > > + > > + return base_addr; > > +} > > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_setup); > > + > > +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev) > > +{ > > + struct pci_controller *hose = pci_bus_to_host(pdev->bus); > > + struct pnv_phb *phb = hose->private_data; > > + u32 bdfn = pci_dev_id(pdev); > > + int rc; > > + > > + rc = opal_npu_mem_release(phb->opal_id, bdfn); > > + if (rc) > > + dev_warn(&pdev->dev, > > + "OPAL reported rc=%d when releasing LPC > > memory\n", rc); > > +} > > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_release); > > + > > + > > int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int > > pe_handle) > > { > > struct spa_data *data = (struct spa_data *) platform_data; > >
diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h index 7de82647e761..f8f8ffb48aa8 100644 --- a/arch/powerpc/include/asm/pnv-ocxl.h +++ b/arch/powerpc/include/asm/pnv-ocxl.h @@ -32,5 +32,7 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); extern void pnv_ocxl_free_xive_irq(u32 irq); +extern u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size); +extern void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); #endif /* _ASM_PNV_OCXL_H */ diff --git a/arch/powerpc/platforms/powernv/ocxl.c b/arch/powerpc/platforms/powernv/ocxl.c index 8c65aacda9c8..b56a48daf48c 100644 --- a/arch/powerpc/platforms/powernv/ocxl.c +++ b/arch/powerpc/platforms/powernv/ocxl.c @@ -475,6 +475,48 @@ void pnv_ocxl_spa_release(void *platform_data) } EXPORT_SYMBOL_GPL(pnv_ocxl_spa_release); +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size) +{ + struct pci_controller *hose = pci_bus_to_host(pdev->bus); + struct pnv_phb *phb = hose->private_data; + u32 bdfn = pci_dev_id(pdev); + __be64 base_addr_be64; + u64 base_addr; + int rc; + + rc = opal_npu_mem_alloc(phb->opal_id, bdfn, size, &base_addr_be64); + if (rc) { + dev_warn(&pdev->dev, + "OPAL could not allocate LPC memory, rc=%d\n", rc); + return 0; + } + + base_addr = be64_to_cpu(base_addr_be64); + + rc = check_hotplug_memory_addressable(base_addr >> PAGE_SHIFT, + size >> PAGE_SHIFT); + if (rc) + return 0; + + return base_addr; +} +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_setup); + +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev) +{ + struct pci_controller *hose = pci_bus_to_host(pdev->bus); + struct pnv_phb *phb = hose->private_data; + u32 bdfn = pci_dev_id(pdev); + int rc; + + rc = opal_npu_mem_release(phb->opal_id, bdfn); + if (rc) + dev_warn(&pdev->dev, + "OPAL reported rc=%d when releasing LPC memory\n", rc); +} +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_release); + + int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) { struct spa_data *data = (struct spa_data *) platform_data;