From patchwork Tue Oct 29 20:34:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Weiny X-Patchwork-Id: 13855422 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B2A320CCE9 for ; Tue, 29 Oct 2024 20:36:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730234165; cv=none; b=nT9qUWLMgcY1pGupCEjITagh++gJ/xDsU2dFkxQMQskh5GqeSYW+0af48jH2SputgSNo13u6QIDIiZgVQbcW41h8wsWCrT9y5fyFVeBf2FPFN+b7yx7fd+OYKbOy/obt8TiZ8BElB3ChLTTJXsZABPF0+KOwvFUm8evOWXGsmvE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730234165; c=relaxed/simple; bh=K+k0tXosQggrTMURAffVjBncyyVcL5TE5nyLNi6NZqU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PPA9o9TD47zg6DZCzJZdIwu2V+ggU0kaL/xpY4zVD1iCoc1dOn7ldPeLeIhOjMcYDeXCK6NOJoDGX7p9q1xT2/qh26jcThJcds8/47C52VzeCUtp9/0tUL8V3rsUUxlXNlqpGLCAWyYPsb+gAMZFDSuHAm/2ngwJ/WA0pmWKDGI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=bOcKV6Rm; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="bOcKV6Rm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730234163; x=1761770163; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=K+k0tXosQggrTMURAffVjBncyyVcL5TE5nyLNi6NZqU=; b=bOcKV6RmDUFmzfPI60bvtqoHxocrWDxTZet1S52jsrnwRs1GT2F1N+sE t/em9Z8luFCAtqcx5h7q4+1KpsYcHSHL6VWbz3VYg5lmQqXiGACIztuH8 Gh6O9lKP+EDB+EedoZi95BSheLZRzBwSOcdDh21PFOsdzSSupQ52pC2YQ BixMC+Iqp67+J3+PfpaF4QE5hpPl6NLSV69Wy5YsqUFdFqqb92IzmaAR7 nuUTt0s1dWiVh3j/amjrhAVkkKvzphVdClwI5/6Lx0u37z4pPYlCaE7bW CLBqaAgV0uz7Q3Rbw5JRS+vjGON7/xvSuijk/IrorTjNUCU1EiOJTumte A==; X-CSE-ConnectionGUID: ZxZKVRU4SQutf0lRdeinLA== X-CSE-MsgGUID: ElRFzgpMRlSAC65UBrNdFQ== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="52457616" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="52457616" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 13:36:03 -0700 X-CSE-ConnectionGUID: 9HZ2Tvx8Rpu4SZ91DRYp4w== X-CSE-MsgGUID: 0WPYD6VTRPWiRnYKX86vIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,243,1725346800"; d="scan'208";a="119561307" Received: from ldmartin-desk2.corp.intel.com (HELO localhost) ([10.125.108.77]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 13:36:01 -0700 From: Ira Weiny Date: Tue, 29 Oct 2024 15:34:54 -0500 Subject: [PATCH v5 19/27] cxl/core: Return endpoint decoder information from region search Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241029-dcd-type2-upstream-v5-19-8739cb67c374@intel.com> References: <20241029-dcd-type2-upstream-v5-0-8739cb67c374@intel.com> In-Reply-To: <20241029-dcd-type2-upstream-v5-0-8739cb67c374@intel.com> To: Dave Jiang , Fan Ni , Jonathan Cameron , Navneet Singh , Jonathan Corbet , Andrew Morton Cc: Dan Williams , Davidlohr Bueso , Alison Schofield , Vishal Verma , Ira Weiny , linux-cxl@vger.kernel.org, linux-doc@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, Li Ming X-Mailer: b4 0.15-dev-2a633 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730234086; l=4661; i=ira.weiny@intel.com; s=20221211; h=from:subject:message-id; bh=K+k0tXosQggrTMURAffVjBncyyVcL5TE5nyLNi6NZqU=; b=nT0K0/eILABegCL0wyiQdY00k/yNvOaYP9shVG+X527P5fYJNbZ2pX86GXG7M5mkiSOeGl8gz qP4vf/txC7ZCNewrCOK/oFbUuGrRMzjIeZSlfWL2ruDypfngQGvJ1n4 X-Developer-Key: i=ira.weiny@intel.com; a=ed25519; pk=noldbkG+Wp1qXRrrkfY1QJpDf7QsOEthbOT7vm0PqsE= cxl_dpa_to_region() finds the region from a tuple. The search involves finding the device endpoint decoder as well. Dynamic capacity extent processing uses the endpoint decoder HPA information to calculate the HPA offset. In addition, well behaved extents should be contained within an endpoint decoder. Return the endpoint decoder found to be used in subsequent DCD code. Reviewed-by: Jonathan Cameron Reviewed-by: Fan Ni Reviewed-by: Dave Jiang Reviewed-by: Li Ming Reviewed-by: Alison Schofield Signed-off-by: Ira Weiny --- drivers/cxl/core/core.h | 6 ++++-- drivers/cxl/core/mbox.c | 2 +- drivers/cxl/core/memdev.c | 4 ++-- drivers/cxl/core/region.c | 8 +++++++- 4 files changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 5d6fe7ab0a78cddb01c7e0d63ed55c36879c4cef..94ee06cfbdca07b50130299dfe0dd6546e7b9dac 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -39,7 +39,8 @@ void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled); int cxl_region_init(void); void cxl_region_exit(void); int cxl_get_poison_by_endpoint(struct cxl_port *port); -struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa); +struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa, + struct cxl_endpoint_decoder **cxled); u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd, u64 dpa); @@ -50,7 +51,8 @@ static inline u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, return ULLONG_MAX; } static inline -struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa) +struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa, + struct cxl_endpoint_decoder **cxled) { return NULL; } diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index a4b5cb61b4e6f9b17e3e3e0cce356b0ac9f960d0..a06137d95c6822192fb279068abf964f98f0a335 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -916,7 +916,7 @@ void cxl_event_trace_record(const struct cxl_memdev *cxlmd, guard(rwsem_read)(&cxl_dpa_rwsem); dpa = le64_to_cpu(evt->media_hdr.phys_addr) & CXL_DPA_MASK; - cxlr = cxl_dpa_to_region(cxlmd, dpa); + cxlr = cxl_dpa_to_region(cxlmd, dpa, NULL); if (cxlr) hpa = cxl_dpa_to_hpa(cxlr, cxlmd, dpa); diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c index 857a9dd88b20291116d20b9c0bbe9e7961f4491f..f0e68264af7b4aa19e44c5a5e01c0a0614b0f27e 100644 --- a/drivers/cxl/core/memdev.c +++ b/drivers/cxl/core/memdev.c @@ -313,7 +313,7 @@ int cxl_inject_poison(struct cxl_memdev *cxlmd, u64 dpa) if (rc) goto out; - cxlr = cxl_dpa_to_region(cxlmd, dpa); + cxlr = cxl_dpa_to_region(cxlmd, dpa, NULL); if (cxlr) dev_warn_once(cxl_mbox->host, "poison inject dpa:%#llx region: %s\n", dpa, @@ -377,7 +377,7 @@ int cxl_clear_poison(struct cxl_memdev *cxlmd, u64 dpa) if (rc) goto out; - cxlr = cxl_dpa_to_region(cxlmd, dpa); + cxlr = cxl_dpa_to_region(cxlmd, dpa, NULL); if (cxlr) dev_warn_once(cxl_mbox->host, "poison clear dpa:%#llx region: %s\n", dpa, diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 34a6f447e75b18e6a1c8c27250a3e425bd0cc515..a0c181cc33e4988e5c841d5b009d3d4aed5606c1 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -2827,6 +2827,7 @@ int cxl_get_poison_by_endpoint(struct cxl_port *port) struct cxl_dpa_to_region_context { struct cxl_region *cxlr; u64 dpa; + struct cxl_endpoint_decoder *cxled; }; static int __cxl_dpa_to_region(struct device *dev, void *arg) @@ -2860,11 +2861,13 @@ static int __cxl_dpa_to_region(struct device *dev, void *arg) dev_name(dev)); ctx->cxlr = cxlr; + ctx->cxled = cxled; return 1; } -struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa) +struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa, + struct cxl_endpoint_decoder **cxled) { struct cxl_dpa_to_region_context ctx; struct cxl_port *port; @@ -2876,6 +2879,9 @@ struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa) if (port && is_cxl_endpoint(port) && cxl_num_decoders_committed(port)) device_for_each_child(&port->dev, &ctx, __cxl_dpa_to_region); + if (cxled) + *cxled = ctx.cxled; + return ctx.cxlr; }