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[v2,0/6] PCI: Add support for J7200 and AM64

Message ID 20210803074932.19820-1-kishon@ti.com (mailing list archive)
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Series PCI: Add support for J7200 and AM64 | expand

Message

Kishon Vijay Abraham I Aug. 3, 2021, 7:49 a.m. UTC
This series adds the compatible specific to J7200 and AM64 and
applies the erratas and configuration specific to them.

This series also includes Nadeem's patch that adds a quirk in
Cadence driver which is used by J7200 [1].

The DT binding for both J7200 and AM64 is already merged.

v1 of the patch series can be found at [2]

Changes from v1:
1) As suggested by Bjorn, used unsigned int :1, instead of bool for
structure members
2) Removed using unnecessary local variables and also fixed some
code alignment

[1] -> https://lore.kernel.org/r/20210528155626.21793-1-nadeem@cadence.com
[2] -> https://lore.kernel.org/r/20210706105035.9915-1-kishon@ti.com

Kishon Vijay Abraham I (5):
  PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool
  PCI: j721e: Add PCIe support for J7200
  PCI: j721e: Add PCIe support for AM64
  misc: pci_endpoint_test: Do not request or allocate IRQs in probe
  misc: pci_endpoint_test: Add deviceID for AM64 and J7200

Nadeem Athani (1):
  PCI: cadence: Add quirk flag to set minimum delay in LTSSM
    Detect.Quiet state

 drivers/misc/pci_endpoint_test.c              | 27 ++++++--
 drivers/pci/controller/cadence/pci-j721e.c    | 61 +++++++++++++++++--
 .../pci/controller/cadence/pcie-cadence-ep.c  |  4 ++
 .../controller/cadence/pcie-cadence-host.c    |  3 +
 drivers/pci/controller/cadence/pcie-cadence.c | 17 ++++++
 drivers/pci/controller/cadence/pcie-cadence.h | 17 +++++-
 6 files changed, 117 insertions(+), 12 deletions(-)

Comments

Lorenzo Pieralisi Aug. 3, 2021, 10:52 a.m. UTC | #1
On Tue, Aug 03, 2021 at 01:19:26PM +0530, Kishon Vijay Abraham I wrote:
> This series adds the compatible specific to J7200 and AM64 and
> applies the erratas and configuration specific to them.
> 
> This series also includes Nadeem's patch that adds a quirk in
> Cadence driver which is used by J7200 [1].
> 
> The DT binding for both J7200 and AM64 is already merged.
> 
> v1 of the patch series can be found at [2]
> 
> Changes from v1:
> 1) As suggested by Bjorn, used unsigned int :1, instead of bool for
> structure members
> 2) Removed using unnecessary local variables and also fixed some
> code alignment
> 
> [1] -> https://lore.kernel.org/r/20210528155626.21793-1-nadeem@cadence.com
> [2] -> https://lore.kernel.org/r/20210706105035.9915-1-kishon@ti.com
> 
> Kishon Vijay Abraham I (5):
>   PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool
>   PCI: j721e: Add PCIe support for J7200
>   PCI: j721e: Add PCIe support for AM64
>   misc: pci_endpoint_test: Do not request or allocate IRQs in probe
>   misc: pci_endpoint_test: Add deviceID for AM64 and J7200
> 
> Nadeem Athani (1):
>   PCI: cadence: Add quirk flag to set minimum delay in LTSSM
>     Detect.Quiet state
> 
>  drivers/misc/pci_endpoint_test.c              | 27 ++++++--
>  drivers/pci/controller/cadence/pci-j721e.c    | 61 +++++++++++++++++--
>  .../pci/controller/cadence/pcie-cadence-ep.c  |  4 ++
>  .../controller/cadence/pcie-cadence-host.c    |  3 +
>  drivers/pci/controller/cadence/pcie-cadence.c | 17 ++++++
>  drivers/pci/controller/cadence/pcie-cadence.h | 17 +++++-
>  6 files changed, 117 insertions(+), 12 deletions(-)

I am not convinced about patch (5) the rest of the series can be
merged (even though I assume patch (6) depends on (5)).

Please let me know,
Lorenzo
Kishon Vijay Abraham I Aug. 11, 2021, 12:26 p.m. UTC | #2
Hi Lorenzo,

On 03/08/21 4:22 pm, Lorenzo Pieralisi wrote:
> On Tue, Aug 03, 2021 at 01:19:26PM +0530, Kishon Vijay Abraham I wrote:
>> This series adds the compatible specific to J7200 and AM64 and
>> applies the erratas and configuration specific to them.
>>
>> This series also includes Nadeem's patch that adds a quirk in
>> Cadence driver which is used by J7200 [1].
>>
>> The DT binding for both J7200 and AM64 is already merged.
>>
>> v1 of the patch series can be found at [2]
>>
>> Changes from v1:
>> 1) As suggested by Bjorn, used unsigned int :1, instead of bool for
>> structure members
>> 2) Removed using unnecessary local variables and also fixed some
>> code alignment
>>
>> [1] -> https://lore.kernel.org/r/20210528155626.21793-1-nadeem@cadence.com
>> [2] -> https://lore.kernel.org/r/20210706105035.9915-1-kishon@ti.com
>>
>> Kishon Vijay Abraham I (5):
>>   PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool
>>   PCI: j721e: Add PCIe support for J7200
>>   PCI: j721e: Add PCIe support for AM64
>>   misc: pci_endpoint_test: Do not request or allocate IRQs in probe
>>   misc: pci_endpoint_test: Add deviceID for AM64 and J7200
>>
>> Nadeem Athani (1):
>>   PCI: cadence: Add quirk flag to set minimum delay in LTSSM
>>     Detect.Quiet state
>>
>>  drivers/misc/pci_endpoint_test.c              | 27 ++++++--
>>  drivers/pci/controller/cadence/pci-j721e.c    | 61 +++++++++++++++++--
>>  .../pci/controller/cadence/pcie-cadence-ep.c  |  4 ++
>>  .../controller/cadence/pcie-cadence-host.c    |  3 +
>>  drivers/pci/controller/cadence/pcie-cadence.c | 17 ++++++
>>  drivers/pci/controller/cadence/pcie-cadence.h | 17 +++++-
>>  6 files changed, 117 insertions(+), 12 deletions(-)
> 
> I am not convinced about patch (5) the rest of the series can be
> merged (even though I assume patch (6) depends on (5)).

I'll drop patch 5, fix your other comments and send a new revision.

Thanks,
Kishon