Show patches with: Submitter = Tomasz Figa       |   26 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v4,7/7] ARM: dts: exynos4: Add nodes for L2 cache controller - - - --- 2014-08-26 Tomasz Figa New
[v4,6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume - - - --- 2014-08-26 Tomasz Figa New
[v4,5/7] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 - - - --- 2014-08-26 Tomasz Figa New
[v4,4/7] ARM: l2c: Add support for overriding prefetch settings - - - --- 2014-08-26 Tomasz Figa New
[v4,3/7] ARM: l2c: Get outer cache .write_sec callback from mach_desc only if not NULL - - - --- 2014-08-26 Tomasz Figa New
[v4,2/7] ARM: l2c: Add interface to ask hypervisor to configure L2C - - - --- 2014-08-26 Tomasz Figa New
[v4,1/7] ARM: l2c: Refactor the driver to use commit-like interface - - - --- 2014-08-26 Tomasz Figa New
[v3,7/7] ARM: dts: exynos4: Add nodes for L2 cache controller - - - --- 2014-07-17 Tomasz Figa New
[v3,6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume - - - --- 2014-07-17 Tomasz Figa New
[v3,5/7] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 - - - --- 2014-07-17 Tomasz Figa New
[v3,4/7] ARM: l2c: Add support for overriding prefetch settings - - - --- 2014-07-17 Tomasz Figa New
[v3,3/7] ARM: l2c: Get outer cache .write_sec callback from mach_desc only if not NULL - - - --- 2014-07-17 Tomasz Figa New
[v3,2/7] ARM: l2c: Add interface to ask hypervisor to configure L2C - - - --- 2014-07-17 Tomasz Figa New
[v3,1/7] ARM: l2c: Refactor the driver to use commit-like interface - - - --- 2014-07-17 Tomasz Figa New
[v2,6/6] ARM: dts: exynos4: Add nodes for L2 cache controller - - - --- 2014-06-25 Tomasz Figa New
[v2,5/6] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 - - - --- 2014-06-25 Tomasz Figa New
[v2,4/6] ARM: mm: l2x0: Add support for overriding prefetch settings - - - --- 2014-06-25 Tomasz Figa New
[v2,3/6] ARM: mm: cache-l2x0: Use l2c_write_sec() for LATENCY_CTRL registers - - - --- 2014-06-25 Tomasz Figa New
[v2,2/6] ARM: Get outer cache .write_sec callback from mach_desc only if not NULL - - - --- 2014-06-25 Tomasz Figa New
[v2,1/6] ARM: mm: cache-l2x0: Add base address argument to write_sec callback - - - --- 2014-06-25 Tomasz Figa New
[0/5] Handle non-secure L2C initialization on Exynos4 - - - --- 2014-06-13 Tomasz Figa New
[5/5] ARM: dts: exynos4: Add nodes for L2 cache controller - - - --- 2014-06-11 Tomasz Figa New
[4/5] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 - - - --- 2014-06-11 Tomasz Figa New
[3/5] ARM: mm: cache-l2x0: Use l2c_write_sec() for LATENCY_CTRL registers - - - --- 2014-06-11 Tomasz Figa New
[2/5] ARM: Get outer cache .write_sec callback from mach_desc only if not NULL - - - --- 2014-06-11 Tomasz Figa New
[1/5] ARM: mm: cache-l2x0: Add base address argument to write_sec callback - - - --- 2014-06-11 Tomasz Figa New