@@ -361,7 +361,6 @@ struct WMD_DEV_CONTEXT {
u32 dwBrdState; /* Last known board state. */
u32 ulIntMask; /* int mask */
u16 ioBase; /* Board I/O base */
- u16 wIntrVal2Dsp; /* MBX value to DSP. See mbx_sh.h */
u32 numTLBEntries; /* DSP MMU TLB entry counter */
u32 fixedTLBEntries; /* Fixed DSPMMU TLB entry count */
@@ -1035,8 +1035,6 @@ static DSP_STATUS WMD_DEV_Create(OUT struct WMD_DEV_CONTEXT **ppDevContext,
if (DSP_SUCCEEDED(status)) {
/* Set the Endianism Register */ /* Need to set this */
- /* default to Proc-copy */
- pDevContext->wIntrVal2Dsp = MBX_PCPY_CLASS;
/* Retrieve the TC u16 SWAP Option */
status = REG_GetValue(NULL, CURRENTCONFIG, TCWORDSWAP,
(u8 *)&tcWordSwap, &tcWordSwapSize);
@@ -152,12 +152,10 @@ DSP_STATUS CHNLSM_InterruptDSP2(struct WMD_DEV_CONTEXT *pDevContext,
}
}
DBG_Trace(DBG_LEVEL3, "writing %x to Mailbox\n",
- pDevContext->wIntrVal2Dsp);
+ wMbVal);
HW_MBOX_MsgWrite(resources.dwMboxBase, MBOX_ARM2DSP,
- pDevContext->wIntrVal2Dsp);
- /* set the Mailbox interrupt to default value */
- pDevContext->wIntrVal2Dsp = MBX_PCPY_CLASS;
+ wMbVal);
return DSP_SOK;
}