diff mbox

[v2,4/6] ARM: OMAP4: PM: Adds PRM register shift and mask bits

Message ID 1250087254-28653-4-git-send-email-rnayak@ti.com (mailing list archive)
State Changes Requested
Delegated to: Kevin Hilman
Headers show

Commit Message

Rajendra Nayak Aug. 12, 2009, 2:27 p.m. UTC 
This patch adds OMAP4 specific PRM register
register field bit masks

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap2/prcm-common.h      |    6 +
 arch/arm/mach-omap2/prm-regbits-44xx.h | 1063 ++++++++++++++++++++++++++++++++
 2 files changed, 1069 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/prm-regbits-44xx.h

Comments

Paul Walmsley Aug. 13, 2009, 1:33 p.m. UTC | #1 
Hello Rajendra,

(These comments apply to your patches 4 through 6.)

First, a couple of general comments:

1. These should be redone using a generator script and Benoit's
   hardware data.  This will reduce the maintainer load to review
   future versions of this file as the hardware is revised.

2. To continue on the topic of redundancy from our earlier messages:
   in these patches, there is quite a lot of it in both register
   addresses and bit definitions.  See for example the WKUPDEP
   register bits (SDMA, TESLA, MPU, etc).  The initiators are repeated
   over and over again.

   Same with some of the register addresses.  CLKCTRL, DYNAMICDEP,
   STATICDEP, for example, are often repeated.  At least for the
   register addresses, what is your opinion about using a multi-level
   macro to separate these out, and reduce the number of definitions,
   as is done in the output of experimental_gen_prm44xx_h.py, for
   example?  Then to use an addressing macro that would take multiple
   arguments, something like what is described in the autogen file
   kernel-templates/mach-omap2/cm_prefix.h ?


Then, a few specific comments:

1. Please add _MASK at the end of all single-bit defines.  This
   is so there is no ambiguity as to whether a macro is a shift
   count or a bitmask.  So, for example,

+#define OMAP4430_MEMIF_STATDEP                 (1 << 4)

should be
   
+#define OMAP4430_MEMIF_STATDEP_MASK            (1 << 4)

   This is something that should have been done with the earliest
   OMAP2/3 macros.  We are slowly converting the ones that don't
   follow this pattern.  


2. The register bit defines should be organized by register and
   each group should be separated with a blank line and comment
   with the register name.  This is the way it was done in the
   existing mach-omap2/*regbits*.h files.  This makes the files
   much more readable.  Here is an example from OMAP3:

/* PM_PWSTCTRL_CORE specific bits */
#define OMAP3430_MEM2ONSTATE_SHIFT                      18
#define OMAP3430_MEM2ONSTATE_MASK                       (0x3 << 18)
#define OMAP3430_MEM1ONSTATE_SHIFT                      16
#define OMAP3430_MEM1ONSTATE_MASK                       (0x3 << 16)
#define OMAP3430_MEM2RETSTATE                           (1 << 9)
#define OMAP3430_MEM1RETSTATE                           (1 << 8)

/* PM_PWSTST_CORE specific bits */
#define OMAP3430_MEM2STATEST_SHIFT                      6
#define OMAP3430_MEM2STATEST_MASK                       (0x3 << 6)
#define OMAP3430_MEM1STATEST_SHIFT                      4
#define OMAP3430_MEM1STATEST_MASK                       (0x3 << 4)

   etc.  Yes, those MEM2RETSTATE, MEM1RETSTATE defines should be
   suffixed with _MASK.


3. There are duplicate macros that should be removed.  If bits are
   shared among registers, they should be moved into a "shared"
   section and marked with a comment with the registers that share
   them.  Again this is done in the previous mach-omap2/*regbits*.h
   files for OMAP2/3.  Here are some examples of duplicate macros from
   the OMAP4 data you posted:

+#define OMAP4430_DPLL_SSC_TYPE                 (1 << 15)
+#define OMAP4430_DPLL_SSC_DOWNSPREAD           (1 << 14)
+#define OMAP4430_DPLL_SSC_ACK                  (1 << 13)
+#define OMAP4430_DPLL_SSC_EN                   (1 << 12)

and


+#define OMAP4430_LOSTMEM_NONRETAINED_BANK      (1 << 8)


4. Have you checked for macro name collisions with different values?
   I have not spotted any collisions yet, but I am curious to know if
   you are testing for these.  For example, on OMAP2/3, some macro
   names, like EN_DSS, are defined with different values for different
   registers.  These were disambiguated by adding the register names.
   For example,

#define OMAP3430_PM_WKDEP_MPU_EN_DSS_MASK		(1 << 5)

...

#define OMAP3430_PM_WKEN_DSS_EN_DSS			(1 << 0)

   (Of course, this latter define should be named
   OMAP3430_PM_WKEN_DSS_EN_DSS_MASK.)


5. There are some typos:

+#define OMAP4430_LOSTMEM_PERIHPMEM_MASK                BITFIELD(8, 8)



regards,

- Paul
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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index b4ce3fa..fd85c04 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -49,6 +49,12 @@ 
 #define OMAP3430_NEON_MOD				0xb00
 #define OMAP3430ES2_USBHOST_MOD				0xc00
 
+#define BITS(n_bit)	\
+	(((1 << n_bit) - 1) | (1 << n_bit))
+
+#define BITFIELD(u_bit, l_bit)	\
+	(BITS(u_bit) & ~((BITS(l_bit)) >> 1))
+
 /* OMAP44XX specific module offsets */
 /* CM1 instances */
 
diff --git a/arch/arm/mach-omap2/prm-regbits-44xx.h b/arch/arm/mach-omap2/prm-regbits-44xx.h
new file mode 100644
index 0000000..0f5a5ad
--- /dev/null
+++ b/arch/arm/mach-omap2/prm-regbits-44xx.h
@@ -0,0 +1,1063 @@ 
+#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_44XX_H
+#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_44XX_H
+
+/*
+ * OMAP4430 Power/Reset Management register bits
+ *
+ * Copyright (C) 2009 Texas Instruments, Inc.
+ *
+ * Written by Rajendra Nayak (rnayak@ti.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "prm.h"
+
+#define OMAP4430_CLKSEL			(1 << 0)
+#define OMAP4430_SYS_CLKSEL		(1 << 0)
+#define OMAP4430_PERIPHMEM_ONSTATE	(1 << 20)
+#define OMAP4430_AESSMEM_ONSTATE	(1 << 16)
+#define OMAP4430_PERIPHMEM_RETSTATE	(1 << 10)
+#define OMAP4430_AESSMEM_RETSTATE	(1 << 8)
+#define OMAP4430_LOWPOWERSTATECHANGE	(1 << 4)
+#define OMAP4430_LOGICRETSTATE		(1 << 2)
+#define OMAP4430_POWERSTATE		(1 << 0)
+#define OMAP4430_INTRANSITION		(1 << 20)
+#define OMAP4430_PERIPHMEM_STATEST	(1 << 8)
+#define OMAP4430_AESSMEM_STATEST	(1 << 4)
+#define OMAP4430_LOGICSTATEST		(1 << 2)
+#define OMAP4430_POWERSTATEST		(1 << 0)
+#define OMAP4430_LOSTMEM_AESSMEM	(1 << 8)
+#define OMAP4430_LOSTCONTEXT_DFF	(1 << 0)
+#define OMAP4430_WKUPDEP_PDM_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_PDM_DMA_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_PDM_IRQ_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_PDM_IRQ_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_PERIHPMEM	(1 << 8)
+#define OMAP4430_WKUPDEP_DMIC_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_DMIC_DMA_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_DMIC_IRQ_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_DMIC_IRQ_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCASP1_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_MCASP1_DMA_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_MCASP1_IRQ_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MCASP1_IRQ_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCBSP1_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MCBSP1_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MCBSP1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCBSP2_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MCBSP2_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MCBSP2_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCBSP3_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MCBSP3_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MCBSP3_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_TIMER5_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_TIMER5_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_TIMER6_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_TIMER6_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_TIMER7_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_TIMER7_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_TIMER8_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_TIMER8_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_WDT3_MPU	(1 << 0)
+#define OMAP4430_DSS_MEM_ONSTATE	(1 << 16)
+#define OMAP4430_DSS_MEM_RETSTATE	(1 << 8)
+#define OMAP4430_DSS_MEM_STATEST	(1 << 4)
+#define OMAP4430_WKUPDEP_DSI2_SDMA	(1 << 11)
+#define OMAP4430_WKUPDEP_DSI2_TESLA	(1 << 10)
+#define OMAP4430_WKUPDEP_DSI2_DUCATI	(1 << 9)
+#define OMAP4430_WKUPDEP_DSI2_MPU	(1 << 8)
+#define OMAP4430_WKUPDEP_DSI1_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_DSI1_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_DSI1_DUCATI	(1 << 5)
+#define OMAP4430_WKUPDEP_DSI1_MPU	(1 << 4)
+#define OMAP4430_WKUPDEP_DISPC_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_DISPC_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_DISPC_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_DISPC_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_DSS_MEM	(1 << 8)
+#define OMAP4430_LOSTCONTEXT_RFF	(1 << 1)
+#define OMAP4430_L3INIT_BANK1_ONSTATE	(1 << 16)
+#define OMAP4430_L3INIT_BANK1_RETSTATE	(1 << 8)
+#define OMAP4430_L3INIT_BANK1_STATEST	(1 << 4)
+#define OMAP4430_WKUPDEP_MMC1_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MMC1_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MMC1_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MMC1_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_L3INIT_BANK1	(1 << 8)
+#define OMAP4430_WKUPDEP_MMC2_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MMC2_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MMC2_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MMC2_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_USB_HOST_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_USB_HOST_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_USB_OTG_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_USB_OTG_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_USB_TLL_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_USB_TLL_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_SATA_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_SATA_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_PCIESS_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_PCIESS_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_XHPI_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MMC6_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MMC6_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MMC6_MPU	(1 << 0)
+#define OMAP4430_NONRETAINED_BANK_ONSTATE	(1 << 18)
+#define OMAP4430_RETAINED_BANK_ONSTATE	(1 << 16)
+#define OMAP4430_NONRETAINED_BANK_RETSTATE	(1 << 9)
+#define OMAP4430_RETAINED_BANK_RETSTATE	(1 << 8)
+#define OMAP4430_NONRETAINED_BANK_STATEST	(1 << 6)
+#define OMAP4430_RETAINED_BANK_STATEST	(1 << 4)
+#define OMAP4430_WKUPDEP_DMTIMER10_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_DMTIMER11_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_DMTIMER11_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_DMTIMER2_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_DMTIMER3_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_DMTIMER3_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_DMTIMER4_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_DMTIMER4_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_DMTIMER9_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_DMTIMER9_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_GPIO2_IRQ2_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_GPIO2_IRQ1_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_GPIO2_IRQ1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_GPIO3_IRQ2_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_GPIO3_IRQ1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_GPIO4_IRQ2_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_GPIO4_IRQ1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_GPIO5_IRQ2_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_GPIO5_IRQ1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_GPIO6_IRQ2_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_GPIO6_IRQ1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_HECC1_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_NONRETAINED_BANK	(1 << 8)
+#define OMAP4430_WKUPDEP_HECC2_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_I2C1_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_I2C1_IRQ_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_I2C1_IRQ_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK	(1 << 8)
+#define OMAP4430_WKUPDEP_I2C2_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_I2C2_IRQ_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_I2C2_IRQ_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK	(1 << 8)
+#define OMAP4430_WKUPDEP_I2C3_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_I2C3_IRQ_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_I2C3_IRQ_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK	(1 << 8)
+#define OMAP4430_WKUPDEP_I2C4_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_I2C4_IRQ_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_I2C4_IRQ_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK	(1 << 8)
+#define OMAP4430_WKUPDEP_MCASP2_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_MCASP2_DMA_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_MCASP2_IRQ_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MCASP2_IRQ_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCASP3_DMA_SDMA	(1 << 7)
+#define OMAP4430_WKUPDEP_MCASP3_DMA_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_MCASP3_IRQ_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MCASP3_IRQ_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCBSP4_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MCBSP4_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MCBSP4_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCSPI1_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MCSPI1_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_MCSPI1_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MCSPI1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCSPI2_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MCSPI2_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MCSPI2_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCSPI3_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MCSPI3_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MCSPI4_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MCSPI4_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MMCSD3_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MMCSD3_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MMCSD3_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MMCSD4_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MMCSD4_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MMCSD4_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_UART1_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_UART1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_UART2_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_UART2_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_UART3_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_UART3_TESLA	(1 << 2)
+#define OMAP4430_WKUPDEP_UART3_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_UART3_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_UART4_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_UART4_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_MMCSD5_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_MMCSD5_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_MMCSD5_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK	(1 << 8)
+#define OMAP4430_WKUPDEP_WDT2_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_WDT2_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_GPIO1_IRQ2_TESLA	(1 << 6)
+#define OMAP4430_WKUPDEP_GPIO1_IRQ1_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_GPIO1_IRQ1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_TIMER1_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_TIMER12_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_USIM_SDMA	(1 << 3)
+#define OMAP4430_WKUPDEP_USIM_MPU	(1 << 0)
+#define OMAP4430_LOSTMEM_WKUP_BANK	(1 << 8)
+#define OMAP4430_WKUPDEP_KEYBOARD_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_RTC_MPU	(1 << 0)
+#define OMAP4430_MPU_RAM_ONSTATE	(1 << 20)
+#define OMAP4430_MPU_L2_ONSTATE		(1 << 18)
+#define OMAP4430_MPU_L1_ONSTATE		(1 << 16)
+#define OMAP4430_MPU_RAM_RETSTATE	(1 << 10)
+#define OMAP4430_MPU_L2_RETSTATE	(1 << 9)
+#define OMAP4430_MPU_L1_RETSTATE	(1 << 8)
+#define OMAP4430_MPU_RAM_STATEST	(1 << 8)
+#define OMAP4430_MPU_L2_STATEST		(1 << 6)
+#define OMAP4430_MPU_L1_STATEST		(1 << 4)
+#define OMAP4430_ICECRUSHER_MPU_RST	(1 << 1)
+#define OMAP4430_EMULATION_RST		(1 << 0)
+#define OMAP4430_LOSTMEM_MPU_RAM	(1 << 10)
+#define OMAP4430_LOSTMEM_MPU_L2		(1 << 9)
+#define OMAP4430_LOSTMEM_MPU_L1		(1 << 8)
+#define OMAP4430_TESLA_EDMA_ONSTATE	(1 << 20)
+#define OMAP4430_TESLA_L2_ONSTATE	(1 << 18)
+#define OMAP4430_TESLA_L1_ONSTATE	(1 << 16)
+#define OMAP4430_TESLA_EDMA_RETSTATE	(1 << 10)
+#define OMAP4430_TESLA_L2_RETSTATE	(1 << 9)
+#define OMAP4430_TESLA_L1_RETSTATE	(1 << 8)
+#define OMAP4430_TESLA_EDMA_STATEST	(1 << 8)
+#define OMAP4430_TESLA_L2_STATEST	(1 << 6)
+#define OMAP4430_TESLA_L1_STATEST	(1 << 4)
+#define OMAP4430_RST2			(1 << 1)
+#define OMAP4430_RST1			(1 << 0)
+#define OMAP4430_TESLA_DSP_EMU_REQ_RSTST	(1 << 3)
+#define OMAP4430_TESLASS_EMU_RSTST	(1 << 2)
+#define OMAP4430_RST2ST			(1 << 1)
+#define OMAP4430_RST1ST			(1 << 0)
+#define OMAP4430_LOSTMEM_TESLA_EDMA	(1 << 10)
+#define OMAP4430_LOSTMEM_TESLA_L2	(1 << 9)
+#define OMAP4430_LOSTMEM_TESLA_L1	(1 << 8)
+#define OMAP4430_TCM2_MEM_ONSTATE	(1 << 22)
+#define OMAP4430_TCM1_MEM_ONSTATE	(1 << 20)
+#define OMAP4430_SL2_MEM_ONSTATE	(1 << 18)
+#define OMAP4430_HWA_MEM_ONSTATE	(1 << 16)
+#define OMAP4430_TCM2_MEM_RETSTATE	(1 << 11)
+#define OMAP4430_TCM1_MEM_RETSTATE	(1 << 10)
+#define OMAP4430_SL2_MEM_RETSTATE	(1 << 9)
+#define OMAP4430_HWA_MEM_RETSTATE	(1 << 8)
+#define OMAP4430_TCM2_MEM_STATEST	(1 << 10)
+#define OMAP4430_TCM1_MEM_STATEST	(1 << 8)
+#define OMAP4430_SL2_MEM_STATEST	(1 << 6)
+#define OMAP4430_HWA_MEM_STATEST	(1 << 4)
+#define OMAP4430_RST3			(1 << 2)
+#define OMAP4430_ICECRUSHER_SEQ2_RST2ST	(1 << 6)
+#define OMAP4430_ICECRUSHER_SEQ1_RST1ST	(1 << 5)
+#define OMAP4430_EMULATION_SEQ2_RST2ST	(1 << 4)
+#define OMAP4430_EMULATION_SEQ1_RST1ST	(1 << 3)
+#define OMAP4430_RST3ST			(1 << 2)
+#define OMAP4430_LOSTMEM_HWA_MEM	(1 << 10)
+#define OMAP4430_LOSTMEM_TCM2_MEM	(1 << 9)
+#define OMAP4430_LOSTMEM_TCM1_MEM	(1 << 8)
+#define OMAP4430_LOSTMEM_SL2_MEM	(1 << 8)
+#define OMAP4430_OCP_NRET_BANK_ONSTATE	(1 << 24)
+#define OMAP4430_DUCATI_UNICACHE_ONSTATE	(1 << 22)
+#define OMAP4430_DUCATI_L2RAM_ONSTATE	(1 << 20)
+#define OMAP4430_CORE_OCMRAM_ONSTATE	(1 << 18)
+#define OMAP4430_CORE_OTHER_BANK_ONSTATE	(1 << 16)
+#define OMAP4430_OCP_NRET_BANK_RETSTATE	(1 << 12)
+#define OMAP4430_DUCATI_UNICACHE_RETSTATE	(1 << 11)
+#define OMAP4430_DUCATI_L2RAM_RETSTATE	(1 << 10)
+#define OMAP4430_CORE_OCMRAM_RETSTATE	(1 << 9)
+#define OMAP4430_CORE_OTHER_BANK_RETSTATE	(1 << 8)
+#define OMAP4430_MEMORYCHANGE		(1 << 3)
+#define OMAP4430_OCP_NRET_BANK_STATEST	(1 << 12)
+#define OMAP4430_DUCATI_UNICACHE_STATEST	(1 << 10)
+#define OMAP4430_DUCATI_L2RAM_STATEST	(1 << 8)
+#define OMAP4430_CORE_OCMRAM_STATEST	(1 << 6)
+#define OMAP4430_CORE_OTHER_BANK_STATEST	(1 << 4)
+#define OMAP4430_LOSTMEM_CORE_OCMRAM	(1 << 8)
+#define OMAP4430_ICECRUSHER_RST2ST	(1 << 6)
+#define OMAP4430_ICECRUSHER_RST1ST	(1 << 5)
+#define OMAP4430_EMULATION_RST2ST	(1 << 4)
+#define OMAP4430_EMULATION_RST1ST	(1 << 3)
+#define OMAP4430_LOSTMEM_DUCATI_L2RAM	(1 << 9)
+#define OMAP4430_LOSTMEM_DUCATI_UNICACHE	(1 << 8)
+#define OMAP4430_LOSTMEM_CORE_OTHER_BANK	(1 << 8)
+#define OMAP4430_LOSTMEM_CORE_NRET_BANK	(1 << 9)
+#define OMAP4430_LOSTMEM_CORE_OTHER_BANK	(1 << 8)
+#define OMAP4430_OCP_SOCKET_REVISION_REV	(1 << 0)
+#define OMAP4430_VC_TOERR_ST		(1 << 31)
+#define OMAP4430_VC_RAERR_ST		(1 << 30)
+#define OMAP4430_VC_SAERR_ST		(1 << 29)
+#define OMAP4430_VP_CORE_TRANXDONE_ST	(1 << 28)
+#define OMAP4430_VP_CORE_EQVALUE_ST	(1 << 27)
+#define OMAP4430_VP_CORE_NOSMPSACK_ST	(1 << 26)
+#define OMAP4430_VP_CORE_MAXVDD_ST	(1 << 25)
+#define OMAP4430_VP_CORE_MINVDD_ST	(1 << 24)
+#define OMAP4430_VP_CORE_OPPCHANGEDONE_ST	(1 << 23)
+#define OMAP4430_VP_IVA_TRANXDONE_ST	(1 << 22)
+#define OMAP4430_VP_IVA_EQVALUE_ST	(1 << 21)
+#define OMAP4430_VP_IVA_NOSMPSACK_ST	(1 << 20)
+#define OMAP4430_VP_IVA_MAXVDD_ST	(1 << 19)
+#define OMAP4430_VP_IVA_MINVDD_ST	(1 << 18)
+#define OMAP4430_VP_IVA_OPPCHANGEDONE_ST	(1 << 17)
+#define OMAP4430_VP_MPU_TRANXDONE_ST	(1 << 16)
+#define OMAP4430_VP_MPU_EQVALUE_ST	(1 << 15)
+#define OMAP4430_VP_MPU_NOSMPSACK_ST	(1 << 14)
+#define OMAP4430_VP_MPU_MAXVDD_ST	(1 << 13)
+#define OMAP4430_VP_MPU_MINVDD_ST	(1 << 12)
+#define OMAP4430_VP_MPU_OPPCHANGEDONE_ST	(1 << 11)
+#define OMAP4430_IO_ST			(1 << 9)
+#define OMAP4430_TRANSITION_ST		(1 << 8)
+#define OMAP4430_DPLL_DDRPHY_RECAL_ST	(1 << 6)
+#define OMAP4430_DPLL_USB_RECAL_ST	(1 << 5)
+#define OMAP4430_DPLL_ABE_RECAL_ST	(1 << 4)
+#define OMAP4430_DPLL_PER_RECAL_ST	(1 << 3)
+#define OMAP4430_DPLL_IVA_RECAL_ST	(1 << 2)
+#define OMAP4430_DPLL_MPU_RECAL_ST	(1 << 1)
+#define OMAP4430_DPLL_CORE_RECAL_ST	(1 << 0)
+#define OMAP4430_VC_TOERR_EN		(1 << 31)
+#define OMAP4430_VC_RAERR_EN		(1 << 30)
+#define OMAP4430_VC_SAERR_EN		(1 << 29)
+#define OMAP4430_VP_CORE_TRANXDONE_EN	(1 << 28)
+#define OMAP4430_VP_CORE_EQVALUE_EN	(1 << 27)
+#define OMAP4430_VP_CORE_NOSMPSACK_EN	(1 << 26)
+#define OMAP4430_VP_CORE_MAXVDD_EN	(1 << 25)
+#define OMAP4430_VP_CORE_MINVDD_EN	(1 << 24)
+#define OMAP4430_VP_CORE_OPPCHANGEDONE_EN	(1 << 23)
+#define OMAP4430_VP_IVA_TRANXDONE_EN	(1 << 22)
+#define OMAP4430_VP_IVA_EQVALUE_EN	(1 << 21)
+#define OMAP4430_VP_IVA_NOSMPSACK_EN	(1 << 20)
+#define OMAP4430_VP_IVA_MAXVDD_EN	(1 << 19)
+#define OMAP4430_VP_IVA_MINVDD_EN	(1 << 18)
+#define OMAP4430_VP_IVA_OPPCHANGEDONE_EN	(1 << 17)
+#define OMAP4430_VP_MPU_TRANXDONE_EN	(1 << 16)
+#define OMAP4430_VP_MPU_EQVALUE_EN	(1 << 15)
+#define OMAP4430_VP_MPU_NOSMPSACK_EN	(1 << 14)
+#define OMAP4430_VP_MPU_MAXVDD_EN	(1 << 13)
+#define OMAP4430_VP_MPU_MINVDD_EN	(1 << 12)
+#define OMAP4430_VP_MPU_OPPCHANGEDONE_EN	(1 << 11)
+#define OMAP4430_IO_EN			(1 << 9)
+#define OMAP4430_TRANSITION_EN		(1 << 8)
+#define OMAP4430_DPLL_DDRPHY_RECAL_EN	(1 << 6)
+#define OMAP4430_DPLL_USB_RECAL_EN	(1 << 5)
+#define OMAP4430_DPLL_ABE_RECAL_EN	(1 << 4)
+#define OMAP4430_DPLL_PER_RECAL_EN	(1 << 3)
+#define OMAP4430_DPLL_IVA_RECAL_EN	(1 << 2)
+#define OMAP4430_DPLL_MPU_RECAL_EN	(1 << 1)
+#define OMAP4430_DPLL_CORE_RECAL_EN	(1 << 0)
+#define OMAP4430_VC_TOERR_ST		(1 << 31)
+#define OMAP4430_VC_RAERR_ST		(1 << 30)
+#define OMAP4430_VC_SAERR_ST		(1 << 29)
+#define OMAP4430_VP_CORE_TRANXDONE_ST	(1 << 28)
+#define OMAP4430_VP_CORE_EQVALUE_ST	(1 << 27)
+#define OMAP4430_VP_CORE_NOSMPSACK_ST	(1 << 26)
+#define OMAP4430_VP_CORE_MAXVDD_ST	(1 << 25)
+#define OMAP4430_VP_CORE_MINVDD_ST	(1 << 24)
+#define OMAP4430_VP_CORE_OPPCHANGEDONE_ST	(1 << 23)
+#define OMAP4430_VP_IVA_TRANXDONE_ST	(1 << 22)
+#define OMAP4430_VP_IVA_EQVALUE_ST	(1 << 21)
+#define OMAP4430_VP_IVA_NOSMPSACK_ST	(1 << 20)
+#define OMAP4430_VP_IVA_MAXVDD_ST	(1 << 19)
+#define OMAP4430_VP_IVA_MINVDD_ST	(1 << 18)
+#define OMAP4430_VP_IVA_OPPCHANGEDONE_ST	(1 << 17)
+#define OMAP4430_FORCEWKUP_ST		(1 << 10)
+#define OMAP4430_DPLL_PER_RECAL_ST	(1 << 3)
+#define OMAP4430_DPLL_IVA_RECAL_ST	(1 << 2)
+#define OMAP4430_DPLL_CORE_RECAL_ST	(1 << 0)
+#define OMAP4430_VC_TOERR_EN		(1 << 31)
+#define OMAP4430_VC_RAERR_EN		(1 << 30)
+#define OMAP4430_VC_SAERR_EN		(1 << 29)
+#define OMAP4430_VP_CORE_TRANXDONE_EN	(1 << 28)
+#define OMAP4430_VP_CORE_EQVALUE_EN	(1 << 27)
+#define OMAP4430_VP_CORE_NOSMPSACK_EN	(1 << 26)
+#define OMAP4430_VP_CORE_MAXVDD_EN	(1 << 25)
+#define OMAP4430_VP_CORE_MINVDD_EN	(1 << 24)
+#define OMAP4430_VP_CORE_OPPCHANGEDONE_EN	(1 << 23)
+#define OMAP4430_VP_IVA_TRANXDONE_EN	(1 << 22)
+#define OMAP4430_VP_IVA_EQVALUE_EN	(1 << 21)
+#define OMAP4430_VP_IVA_NOSMPSACK_EN	(1 << 20)
+#define OMAP4430_VP_IVA_MAXVDD_EN	(1 << 19)
+#define OMAP4430_VP_IVA_MINVDD_EN	(1 << 18)
+#define OMAP4430_VP_IVA_OPPCHANGEDONE_EN	(1 << 17)
+#define OMAP4430_FORCEWKUP_EN		(1 << 10)
+#define OMAP4430_DPLL_PER_RECAL_EN	(1 << 3)
+#define OMAP4430_DPLL_IVA_RECAL_EN	(1 << 2)
+#define OMAP4430_DPLL_CORE_RECAL_EN	(1 << 0)
+#define OMAP4430_DPLL_ABE_RECAL_ST	(1 << 4)
+#define OMAP4430_DPLL_IVA_RECAL_ST	(1 << 2)
+#define OMAP4430_DPLL_ABE_RECAL_EN	(1 << 4)
+#define OMAP4430_DPLL_IVA_RECAL_EN	(1 << 2)
+#define OMAP4430_MODULEMODE		(1 << 0)
+#define OMAP4430_WKUPDEP_SR_MPU_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_SR_IVA_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_SR_IVA_MPU	(1 << 0)
+#define OMAP4430_WKUPDEP_SR_CORE_DUCATI	(1 << 1)
+#define OMAP4430_WKUPDEP_SR_CORE_MPU	(1 << 0)
+#define OMAP4430_CAM_MEM_ONSTATE	(1 << 16)
+#define OMAP4430_CAM_MEM_STATEST	(1 << 4)
+#define OMAP4430_LOSTMEM_CAM_MEM	(1 << 8)
+#define OMAP4430_LOSTMEM_CAM_MEM	(1 << 8)
+#define OMAP4430_GFX_MEM_ONSTATE	(1 << 16)
+#define OMAP4430_GFX_MEM_STATEST	(1 << 4)
+#define OMAP4430_LOSTMEM_GFX_MEM	(1 << 8)
+#define OMAP4430_EMU_BANK_ONSTATE	(1 << 16)
+#define OMAP4430_EMU_BANK_STATEST	(1 << 4)
+#define OMAP4430_LOSTMEM_EMU_BANK	(1 << 8)
+#define OMAP4430_RST_GLOBAL_COLD_SW	(1 << 1)
+#define OMAP4430_RST_GLOBAL_WARM_SW	(1 << 0)
+#define OMAP4430_ICEPICK_RST		(1 << 9)
+#define OMAP4430_VDD_CORE_VOLT_MGR_RST	(1 << 8)
+#define OMAP4430_VDD_IVA_VOLT_MGR_RST	(1 << 7)
+#define OMAP4430_VDD_MPU_VOLT_MGR_RST	(1 << 6)
+#define OMAP4430_EXTERNAL_WARM_RST	(1 << 5)
+#define OMAP4430_SECURE_WDT_RST		(1 << 4)
+#define OMAP4430_MPU_WDT_RST		(1 << 3)
+#define OMAP4430_MPU_SECURITY_VIOL_RST	(1 << 2)
+#define OMAP4430_GLOBAL_WARM_SW_RST	(1 << 1)
+#define OMAP4430_GLOBAL_COLD_RST	(1 << 0)
+#define OMAP4430_RSTTIME2		(1 << 8)
+#define OMAP4430_RSTTIME1		(1 << 0)
+#define OMAP4430_CLKREQ_COND		(1 << 0)
+#define OMAP4430_VDD_IVA_PRESENCE	(1 << 9)
+#define OMAP4430_VDD_MPU_PRESENCE	(1 << 8)
+#define OMAP4430_AUTO_CTRL_VDD_IVA_L	(1 << 4)
+#define OMAP4430_AUTO_CTRL_VDD_MPU_L	(1 << 2)
+#define OMAP4430_AUTO_CTRL_VDD_CORE_L	(1 << 0)
+#define OMAP4430_PWRREQ_COND		(1 << 0)
+#define OMAP4430_PONOUT_2_PGOODIN_TIME	(1 << 8)
+#define OMAP4430_PCHARGE_TIME		(1 << 0)
+#define OMAP4430_ISO_2_ON_TIME		(1 << 0)
+#define OMAP4430_GLOBAL_WUEN		(1 << 16)
+#define OMAP4430_WUCLK_STATUS		(1 << 9)
+#define OMAP4430_WUCLK_CTRL		(1 << 8)
+#define OMAP4430_ISOCLK_STATUS		(1 << 1)
+#define OMAP4430_ISOCLK_OVERRIDE	(1 << 0)
+#define OMAP4430_ERROROFFSET		(1 << 24)
+#define OMAP4430_ERRORGAIN		(1 << 16)
+#define OMAP4430_INITVOLTAGE		(1 << 8)
+#define OMAP4430_TIMEOUTEN		(1 << 3)
+#define OMAP4430_INITVDD		(1 <<  2)
+#define OMAP4430_FORCEUPDATE		(1 << 1)
+#define OMAP4430_VPENABLE		(1 << 0)
+#define OMAP4430_VPINIDLE		(1 << 0)
+#define OMAP4430_VDDMAX			(1 << 24)
+#define OMAP4430_VDDMIN			(1 << 16)
+#define OMAP4430_TIMEOUT		(1 << 0)
+#define OMAP4430_VPVOLTAGE		(1 << 0)
+#define OMAP4430_SMPSWAITTIMEMAX	(1 << 8)
+#define OMAP4430_VSTEPMAX		(1 << 0)
+#define OMAP4430_SMPSWAITTIMEMIN	(1 << 8)
+#define OMAP4430_VSTEPMIN		(1 << 0)
+#define OMAP4430_SA_VDD_MPU_L		(1 << 16)
+#define OMAP4430_SA_VDD_IVA_L		(1 << 8)
+#define OMAP4430_SA_VDD_CORE_L		(1 << 0)
+#define OMAP4430_VOLRA_VDD_MPU_L	(1 << 16)
+#define OMAP4430_VOLRA_VDD_IVA_L	(1 << 8)
+#define OMAP4430_VOLRA_VDD_CORE_L	(1 << 0)
+#define OMAP4430_CMDRA_VDD_MPU_L	(1 << 16)
+#define OMAP4430_CMDRA_VDD_IVA_L	(1 << 8)
+#define OMAP4430_CMDRA_VDD_CORE_L	(1 << 0)
+#define OMAP4430_ON			(1 << 24)
+#define OMAP4430_ONLP			(1 << 16)
+#define OMAP4430_RET			(1 << 8)
+#define OMAP4430_OFF			(1 << 0)
+#define OMAP4430_VALID			(1 << 24)
+#define OMAP4430_DATA			(1 << 16)
+#define OMAP4430_REGADDR		(1 << 8)
+#define OMAP4430_SLAVEADDR		(1 << 0)
+#define OMAP4430_RACEN_VDD_MPU_L	(1 << 20)
+#define OMAP4430_RAC_VDD_MPU_L		(1 << 19)
+#define OMAP4430_RAV_VDD_MPU_L		(1 << 18)
+#define OMAP4430_CMD_VDD_MPU_L		(1 << 17)
+#define OMAP4430_CMD_VDD_IVA_L		(1 << 12)
+#define OMAP4430_RACEN_VDD_IVA_L	(1 << 11)
+#define OMAP4430_RAC_VDD_IVA_L		(1 << 10)
+#define OMAP4430_RAV_VDD_IVA_L		(1 << 9)
+#define OMAP4430_CMD_VDD_CORE_L		(1 << 4)
+#define OMAP4430_RACEN_VDD_CORE_L	(1 << 3)
+#define OMAP4430_RAC_VDD_CORE_L		(1 << 2)
+#define OMAP4430_RAV_VDD_CORE_L		(1 << 1)
+#define OMAP4430_DFILTEREN		(1 << 6)
+#define OMAP4430_HSMASTER		(1 << 5)
+#define OMAP4430_SRMODEEN		(1 << 4)
+#define OMAP4430_HSMODEEN		(1 << 3)
+#define OMAP4430_HSMCODE		(1 << 0)
+#define OMAP4430_HSSCLL			(1 << 24)
+#define OMAP4430_HSSCLH			(1 << 16)
+#define OMAP4430_SCLL			(1 << 8)
+#define OMAP4430_SCLH			(1 << 0)
+#define OMAP4430_SLPCNT_VALUE		(1 << 16)
+#define OMAP4430_VSETUPCNT_VALUE	(1 << 8)
+#define OMAP4430_PCHARGECNT_VALUE	(1 << 0)
+#define OMAP4430_ENABLE_RTA_EXPORT	(1 << 0)
+#define OMAP4430_AIPOFF			(1 << 8)
+#define OMAP4430_ENFUNC5		(1 << 7)
+#define OMAP4430_ENFUNC4		(1 << 6)
+#define OMAP4430_ENFUNC3		(1 << 5)
+#define OMAP4430_ENFUNC2_EXPORT		(1 << 4)
+#define OMAP4430_ENFUNC1		(1 << 3)
+#define OMAP4430_ABBOFF_SLEEP_EXPORT	(1 << 2)
+#define OMAP4430_ABBOFF_ACT_EXPORT	(1 << 1)
+#define OMAP4430_SRAM_IN_TRANSITION	(1 << 9)
+#define OMAP4430_SRAMLDO_STATUS		(1 << 8)
+#define OMAP4430_RETMODE_ENABLE		(1 << 0)
+#define OMAP4430_SRAM_IN_TRANSITION	(1 << 9)
+#define OMAP4430_SRAMLDO_STATUS		(1 << 8)
+#define OMAP4430_SRAM_IN_TRANSITION	(1 << 9)
+#define OMAP4430_SRAMLDO_STATUS		(1 << 8)
+#define OMAP4430_SR2_WTCNT_VALUE	(1 << 8)
+#define OMAP4430_NOCAP_EXPORT		(1 << 4)
+#define OMAP4430_SLEEP_RBB_SEL		(1 << 3)
+#define OMAP4430_ACTIVE_FBB_SEL		(1 << 2)
+#define OMAP4430_ACTIVE_RBB_SEL		(1 << 1)
+#define OMAP4430_SR2EN			(1 << 0)
+#define OMAP4430_SR2_IN_TRANSITION	(1 << 6)
+#define OMAP4430_SR2_STATUS		(1 << 3)
+#define OMAP4430_OPP_CHANGE		(1 << 2)
+#define OMAP4430_OPP_SEL		(1 << 0)
+#define OMAP4430_NOCAP_EXPORT		(1 << 4)
+#define OMAP4430_SLEEP_RBB_SEL		(1 << 3)
+#define OMAP4430_ACTIVE_FBB_SEL		(1 << 2)
+#define OMAP4430_ACTIVE_RBB_SEL		(1 << 1)
+#define OMAP4430_CBIASSEL		(1 << 0)
+#define OMAP4430_DEVICE_OFF_ENABLE	(1 << 0)
+#define OMAP4430_PHASE2B_COMPLETED	(1 << 2)
+#define OMAP4430_PHASE2A_COMPLETED	(1 << 1)
+#define OMAP4430_PHASE1_COMPLETED	(1 << 0)
+#define OMAP4430_PHASE1_CNDP		(1 << 0)
+#define OMAP4430_PHASE2A_CNDP		(1 << 0)
+#define OMAP4430_PHASE2B_CNDP		(1 << 0)
+#define OMAP4430_MODEM_SLEEP_ST		(1 << 16)
+#define OMAP4430_MODEM_SHUTDOWN_IRQ	(1 << 9)
+#define OMAP4430_MODEM_WAKE_IRQ		(1 << 8)
+#define OMAP4430_MODEM_READY		(1 << 1)
+#define OMAP4430_WAKE_MODEM		(1 << 0)
+#define OMAP4430_INITVDD_EDGE		(1 << 1)
+#define OMAP4430_FORCEUPDATE_EDGE	(1 << 1)
+
+
+#define OMAP4430_PRM_CLKSEL_MASK		BITFIELD(0, 0)
+#define OMAP4430_SYS_CLKSEL_MASK		BITFIELD(2, 0)
+#define OMAP4430_PERIPHMEM_ONSTATE_MASK		BITFIELD(21, 20)
+#define OMAP4430_AESSMEM_ONSTATE_MASK		BITFIELD(17, 16)
+#define OMAP4430_PERIPHMEM_RETSTATE_MASK	BITFIELD(10, 10)
+#define OMAP4430_AESSMEM_RETSTATE_MASK		BITFIELD(8, 8)
+#define OMAP4430_LOWPOWERSTATECHANGE_MASK	BITFIELD(4, 4)
+#define OMAP4430_LOGICRETSTATE_MASK		BITFIELD(2, 2)
+#define OMAP4430_POWERSTATE_MASK		BITFIELD(1, 0)
+#define OMAP4430_INTRANSITION_MASK		BITFIELD(20, 20)
+#define OMAP4430_PERIPHMEM_STATEST_MASK		BITFIELD(9, 8)
+#define OMAP4430_AESSMEM_STATEST_MASK		BITFIELD(5, 4)
+#define OMAP4430_LOGICSTATEST_MASK		BITFIELD(2, 2)
+#define OMAP4430_POWERSTATEST_MASK		BITFIELD(1, 0)
+#define OMAP4430_LOSTMEM_AESSMEM_MASK		BITFIELD(8, 8)
+#define OMAP4430_LOSTCONTEXT_DFF_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_PDM_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_PDM_DMA_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_PDM_IRQ_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_PDM_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_PERIHPMEM_MASK		BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_DMIC_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_DMIC_DMA_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_DMIC_IRQ_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_DMIC_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCASP1_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_MCASP1_DMA_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_MCASP1_IRQ_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MCASP1_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCBSP1_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MCBSP1_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MCBSP1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCBSP2_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MCBSP2_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MCBSP2_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCBSP3_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MCBSP3_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MCBSP3_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_TIMER5_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_TIMER5_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_TIMER6_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_TIMER6_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_TIMER7_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_TIMER7_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_TIMER8_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_TIMER8_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_WDT3_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_DSS_MEM_ONSTATE_MASK		BITFIELD(17, 16)
+#define OMAP4430_DSS_MEM_RETSTATE_MASK		BITFIELD(8, 8)
+#define OMAP4430_DSS_MEM_STATEST_MASK		BITFIELD(5, 4)
+#define OMAP4430_WKUPDEP_DSI2_SDMA_MASK		BITFIELD(11, 11)
+#define OMAP4430_WKUPDEP_DSI2_TESLA_MASK	BITFIELD(10, 10)
+#define OMAP4430_WKUPDEP_DSI2_DUCATI_MASK	BITFIELD(9, 9)
+#define OMAP4430_WKUPDEP_DSI2_MPU_MASK		BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_DSI1_SDMA_MASK		BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_DSI1_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_DSI1_DUCATI_MASK	BITFIELD(5, 5)
+#define OMAP4430_WKUPDEP_DSI1_MPU_MASK		BITFIELD(4, 4)
+#define OMAP4430_WKUPDEP_DISPC_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_DISPC_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_DISPC_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_DISPC_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_DSS_MEM_MASK		BITFIELD(8, 8)
+#define OMAP4430_LOSTCONTEXT_RFF_MASK		BITFIELD(1, 1)
+#define OMAP4430_L3INIT_BANK1_ONSTATE_MASK	BITFIELD(17, 16)
+#define OMAP4430_L3INIT_BANK1_RETSTATE_MASK	BITFIELD(8, 8)
+#define OMAP4430_L3INIT_BANK1_STATEST_MASK	BITFIELD(5, 4)
+#define OMAP4430_WKUPDEP_MMC1_SDMA_MASK		BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MMC1_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MMC1_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MMC1_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_L3INIT_BANK1_MASK	BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_MMC2_SDMA_MASK		BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MMC2_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MMC2_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MMC2_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_USB_HOST_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_USB_HOST_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_USB_OTG_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_USB_OTG_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_USB_TLL_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_USB_TLL_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_SATA_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_SATA_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_PCIESS_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_PCIESS_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_XHPI_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MMC6_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MMC6_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MMC6_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_NONRETAINED_BANK_ONSTATE_MASK	BITFIELD(19, 18)
+#define OMAP4430_RETAINED_BANK_ONSTATE_MASK	BITFIELD(17, 16)
+#define OMAP4430_NONRETAINED_BANK_RETSTATE_MASK	BITFIELD(9, 9)
+#define OMAP4430_RETAINED_BANK_RETSTATE_MASK	BITFIELD(8, 8)
+#define OMAP4430_NONRETAINED_BANK_STATEST_MASK	BITFIELD(7, 6)
+#define OMAP4430_RETAINED_BANK_STATEST_MASK	BITFIELD(5, 4)
+#define OMAP4430_WKUPDEP_DMTIMER10_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_DMTIMER11_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_DMTIMER11_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_DMTIMER2_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_DMTIMER3_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_DMTIMER3_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_DMTIMER4_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_DMTIMER4_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_DMTIMER9_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_DMTIMER9_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_GPIO2_IRQ2_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_GPIO2_IRQ1_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_GPIO2_IRQ1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_GPIO3_IRQ2_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_GPIO3_IRQ1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_GPIO4_IRQ2_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_GPIO4_IRQ1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_GPIO5_IRQ2_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_GPIO5_IRQ1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_GPIO6_IRQ2_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_GPIO6_IRQ1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_HECC1_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_NONRETAINED_BANK_MASK	BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_HECC2_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_I2C1_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_I2C1_IRQ_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_I2C1_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK_MASK	BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_I2C2_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_I2C2_IRQ_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_I2C2_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK_MASK	BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_I2C3_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_I2C3_IRQ_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_I2C3_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK_MASK	BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_I2C4_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_I2C4_IRQ_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_I2C4_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK_MASK	BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_MCASP2_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_MCASP2_DMA_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_MCASP2_IRQ_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MCASP2_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCASP3_DMA_SDMA_MASK	BITFIELD(7, 7)
+#define OMAP4430_WKUPDEP_MCASP3_DMA_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_MCASP3_IRQ_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MCASP3_IRQ_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCBSP4_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MCBSP4_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MCBSP4_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCSPI1_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MCSPI1_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_MCSPI1_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MCSPI1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCSPI2_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MCSPI2_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MCSPI2_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCSPI3_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MCSPI3_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MCSPI4_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MCSPI4_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MMCSD3_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MMCSD3_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MMCSD3_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MMCSD4_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MMCSD4_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MMCSD4_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_UART1_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_UART1_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_UART2_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_UART2_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_UART3_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_UART3_TESLA_MASK	BITFIELD(2, 2)
+#define OMAP4430_WKUPDEP_UART3_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_UART3_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_UART4_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_UART4_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_MMCSD5_SDMA_MASK	BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_MMCSD5_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_MMCSD5_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_RETAINED_BANK_MASK	BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_WDT2_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_WDT2_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_GPIO1_IRQ2_TESLA_MASK	BITFIELD(6, 6)
+#define OMAP4430_WKUPDEP_GPIO1_IRQ1_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_GPIO1_IRQ1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_TIMER1_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_TIMER12_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_USIM_SDMA_MASK		BITFIELD(3, 3)
+#define OMAP4430_WKUPDEP_USIM_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_WKUP_BANK_MASK		BITFIELD(8, 8)
+#define OMAP4430_WKUPDEP_KEYBOARD_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_RTC_MPU_MASK		BITFIELD(0, 0)
+#define OMAP4430_MPU_RAM_ONSTATE_MASK		BITFIELD(21, 20)
+#define OMAP4430_MPU_L2_ONSTATE_MASK		BITFIELD(19, 18)
+#define OMAP4430_MPU_L1_ONSTATE_MASK		BITFIELD(17, 16)
+#define OMAP4430_MPU_RAM_RETSTATE_MASK		BITFIELD(10, 10)
+#define OMAP4430_MPU_L2_RETSTATE_MASK		BITFIELD(9, 9)
+#define OMAP4430_MPU_L1_RETSTATE_MASK		BITFIELD(8, 8)
+#define OMAP4430_MPU_RAM_STATEST_MASK		BITFIELD(9, 8)
+#define OMAP4430_MPU_L2_STATEST_MASK		BITFIELD(7, 6)
+#define OMAP4430_MPU_L1_STATEST_MASK		BITFIELD(5, 4)
+#define OMAP4430_ICECRUSHER_MPU_RST_MASK	BITFIELD(1, 1)
+#define OMAP4430_EMULATION_RST_MASK		BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_MPU_RAM_MASK		BITFIELD(10, 10)
+#define OMAP4430_LOSTMEM_MPU_L2_MASK		BITFIELD(9, 9)
+#define OMAP4430_LOSTMEM_MPU_L1_MASK		BITFIELD(8, 8)
+#define OMAP4430_TESLA_EDMA_ONSTATE_MASK	BITFIELD(21, 20)
+#define OMAP4430_TESLA_L2_ONSTATE_MASK		BITFIELD(19, 18)
+#define OMAP4430_TESLA_L1_ONSTATE_MASK		BITFIELD(17, 16)
+#define OMAP4430_TESLA_EDMA_RETSTATE_MASK	BITFIELD(10, 10)
+#define OMAP4430_TESLA_L2_RETSTATE_MASK		BITFIELD(9, 9)
+#define OMAP4430_TESLA_L1_RETSTATE_MASK		BITFIELD(8, 8)
+#define OMAP4430_TESLA_EDMA_STATEST_MASK	BITFIELD(9, 8)
+#define OMAP4430_TESLA_L2_STATEST_MASK		BITFIELD(7, 6)
+#define OMAP4430_TESLA_L1_STATEST_MASK		BITFIELD(5, 4)
+#define OMAP4430_RST2_MASK			BITFIELD(1, 1)
+#define OMAP4430_RST1_MASK			BITFIELD(0, 0)
+#define OMAP4430_TESLA_DSP_EMU_REQ_RSTST_MASK	BITFIELD(3, 3)
+#define OMAP4430_TESLASS_EMU_RSTST_MASK		BITFIELD(2, 2)
+#define OMAP4430_RST2ST_MASK			BITFIELD(1, 1)
+#define OMAP4430_RST1ST_MASK			BITFIELD(0, 0)
+#define OMAP4430_LOSTMEM_TESLA_EDMA_MASK	BITFIELD(10, 10)
+#define OMAP4430_LOSTMEM_TESLA_L2_MASK		BITFIELD(9, 9)
+#define OMAP4430_LOSTMEM_TESLA_L1_MASK		BITFIELD(8, 8)
+#define OMAP4430_TCM2_MEM_ONSTATE_MASK		BITFIELD(23, 22)
+#define OMAP4430_TCM1_MEM_ONSTATE_MASK		BITFIELD(21, 20)
+#define OMAP4430_SL2_MEM_ONSTATE_MASK		BITFIELD(19, 18)
+#define OMAP4430_HWA_MEM_ONSTATE_MASK		BITFIELD(17, 16)
+#define OMAP4430_TCM2_MEM_RETSTATE_MASK		BITFIELD(11, 11)
+#define OMAP4430_TCM1_MEM_RETSTATE_MASK		BITFIELD(10, 10)
+#define OMAP4430_SL2_MEM_RETSTATE_MASK		BITFIELD(9, 9)
+#define OMAP4430_HWA_MEM_RETSTATE_MASK		BITFIELD(8, 8)
+#define OMAP4430_TCM2_MEM_STATEST_MASK		BITFIELD(11, 10)
+#define OMAP4430_TCM1_MEM_STATEST_MASK		BITFIELD(9, 8)
+#define OMAP4430_SL2_MEM_STATEST_MASK		BITFIELD(7, 6)
+#define OMAP4430_HWA_MEM_STATEST_MASK		BITFIELD(5, 4)
+#define OMAP4430_RST3_MASK			BITFIELD(2, 2)
+#define OMAP4430_ICECRUSHER_SEQ2_RST2ST_MASK	BITFIELD(6, 6)
+#define OMAP4430_ICECRUSHER_SEQ1_RST1ST_MASK	BITFIELD(5, 5)
+#define OMAP4430_EMULATION_SEQ2_RST2ST_MASK	BITFIELD(4, 4)
+#define OMAP4430_EMULATION_SEQ1_RST1ST_MASK	BITFIELD(3, 3)
+#define OMAP4430_RST3ST_MASK			BITFIELD(2, 2)
+#define OMAP4430_LOSTMEM_HWA_MEM_MASK		BITFIELD(10, 10)
+#define OMAP4430_LOSTMEM_TCM2_MEM_MASK		BITFIELD(9, 9)
+#define OMAP4430_LOSTMEM_TCM1_MEM_MASK		BITFIELD(8, 8)
+#define OMAP4430_LOSTMEM_SL2_MEM_MASK		BITFIELD(8, 8)
+#define OMAP4430_OCP_NRET_BANK_ONSTATE_MASK	BITFIELD(25, 24)
+#define OMAP4430_DUCATI_UNICACHE_ONSTATE_MASK	BITFIELD(23, 22)
+#define OMAP4430_DUCATI_L2RAM_ONSTATE_MASK	BITFIELD(21, 20)
+#define OMAP4430_CORE_OCMRAM_ONSTATE_MASK	BITFIELD(19, 18)
+#define OMAP4430_CORE_OTHER_BANK_ONSTATE_MASK	BITFIELD(17, 16)
+#define OMAP4430_OCP_NRET_BANK_RETSTATE_MASK	BITFIELD(12, 12)
+#define OMAP4430_DUCATI_UNICACHE_RETSTATE_MASK	BITFIELD(11, 11)
+#define OMAP4430_DUCATI_L2RAM_RETSTATE_MASK	BITFIELD(10, 10)
+#define OMAP4430_CORE_OCMRAM_RETSTATE_MASK	BITFIELD(9, 9)
+#define OMAP4430_CORE_OTHER_BANK_RETSTATE_MASK	BITFIELD(8, 8)
+#define OMAP4430_MEMORYCHANGE_MASK		BITFIELD(3, 3)
+#define OMAP4430_OCP_NRET_BANK_STATEST_MASK	BITFIELD(13, 12)
+#define OMAP4430_DUCATI_UNICACHE_STATEST_MASK	BITFIELD(11, 10)
+#define OMAP4430_DUCATI_L2RAM_STATEST_MASK	BITFIELD(9, 8)
+#define OMAP4430_CORE_OCMRAM_STATEST_MASK	BITFIELD(7, 6)
+#define OMAP4430_CORE_OTHER_BANK_STATEST_MASK	BITFIELD(5, 4)
+#define OMAP4430_LOSTMEM_CORE_OCMRAM_MASK	BITFIELD(8, 8)
+#define OMAP4430_ICECRUSHER_RST2ST_MASK		BITFIELD(6, 6)
+#define OMAP4430_ICECRUSHER_RST1ST_MASK		BITFIELD(5, 5)
+#define OMAP4430_EMULATION_RST2ST_MASK		BITFIELD(4, 4)
+#define OMAP4430_EMULATION_RST1ST_MASK		BITFIELD(3, 3)
+#define OMAP4430_LOSTMEM_DUCATI_L2RAM_MASK	BITFIELD(9, 9)
+#define OMAP4430_LOSTMEM_DUCATI_UNICACHE_MASK	BITFIELD(8, 8)
+#define OMAP4430_LOSTMEM_CORE_OTHER_BANK_MASK	BITFIELD(8, 8)
+#define OMAP4430_DMM_LOSTMEM_CORE_NRET_BANK_MASK	BITFIELD(9, 9)
+#define OMAP4430_LOSTMEM_CORE_NRET_BANK_MASK	BITFIELD(8, 8)
+#define OMAP4430_REV_MASK			BITFIELD(7, 0)
+#define OMAP4430_VC_TOERR_ST_MASK		BITFIELD(31, 31)
+#define OMAP4430_VC_RAERR_ST_MASK		BITFIELD(30, 30)
+#define OMAP4430_VC_SAERR_ST_MASK		BITFIELD(29, 29)
+#define OMAP4430_VP_CORE_TRANXDONE_ST_MASK	BITFIELD(28, 28)
+#define OMAP4430_VP_CORE_EQVALUE_ST_MASK	BITFIELD(27, 27)
+#define OMAP4430_VP_CORE_NOSMPSACK_ST_MASK	BITFIELD(26, 26)
+#define OMAP4430_VP_CORE_MAXVDD_ST_MASK		BITFIELD(25, 25)
+#define OMAP4430_VP_CORE_MINVDD_ST_MASK		BITFIELD(24, 24)
+#define OMAP4430_VP_CORE_OPPCHANGEDONE_ST_MASK	BITFIELD(23, 23)
+#define OMAP4430_VP_IVA_TRANXDONE_ST_MASK	BITFIELD(22, 22)
+#define OMAP4430_VP_IVA_EQVALUE_ST_MASK		BITFIELD(21, 21)
+#define OMAP4430_VP_IVA_NOSMPSACK_ST_MASK	BITFIELD(20, 20)
+#define OMAP4430_VP_IVA_MAXVDD_ST_MASK		BITFIELD(19, 19)
+#define OMAP4430_VP_IVA_MINVDD_ST_MASK		BITFIELD(18, 18)
+#define OMAP4430_VP_IVA_OPPCHANGEDONE_ST_MASK	BITFIELD(17, 17)
+#define OMAP4430_VP_MPU_TRANXDONE_ST_MASK	BITFIELD(16, 16)
+#define OMAP4430_VP_MPU_EQVALUE_ST_MASK		BITFIELD(15, 15)
+#define OMAP4430_VP_MPU_NOSMPSACK_ST_MASK	BITFIELD(14, 14)
+#define OMAP4430_VP_MPU_MAXVDD_ST_MASK		BITFIELD(13, 13)
+#define OMAP4430_VP_MPU_MINVDD_ST_MASK		BITFIELD(12, 12)
+#define OMAP4430_VP_MPU_OPPCHANGEDONE_ST_MASK	BITFIELD(11, 11)
+#define OMAP4430_IO_ST_MASK			BITFIELD(9, 9)
+#define OMAP4430_TRANSITION_ST_MASK		BITFIELD(8, 8)
+#define OMAP4430_DPLL_DDRPHY_RECAL_ST_MASK	BITFIELD(6, 6)
+#define OMAP4430_DPLL_USB_RECAL_ST_MASK		BITFIELD(5, 5)
+#define OMAP4430_DPLL_ABE_RECAL_ST_MASK		BITFIELD(4, 4)
+#define OMAP4430_DPLL_PER_RECAL_ST_MASK		BITFIELD(3, 3)
+#define OMAP4430_DPLL_IVA_RECAL_ST_MASK		BITFIELD(2, 2)
+#define OMAP4430_DPLL_MPU_RECAL_ST_MASK		BITFIELD(1, 1)
+#define OMAP4430_DPLL_CORE_RECAL_ST_MASK	BITFIELD(0, 0)
+#define OMAP4430_VC_TOERR_EN_MASK		BITFIELD(31, 31)
+#define OMAP4430_VC_RAERR_EN_MASK		BITFIELD(30, 30)
+#define OMAP4430_VC_SAERR_EN_MASK		BITFIELD(29, 29)
+#define OMAP4430_VP_CORE_TRANXDONE_EN_MASK	BITFIELD(28, 28)
+#define OMAP4430_VP_CORE_EQVALUE_EN_MASK	BITFIELD(27, 27)
+#define OMAP4430_VP_CORE_NOSMPSACK_EN_MASK	BITFIELD(26, 26)
+#define OMAP4430_VP_CORE_MAXVDD_EN_MASK		BITFIELD(25, 25)
+#define OMAP4430_VP_CORE_MINVDD_EN_MASK		BITFIELD(24, 24)
+#define OMAP4430_VP_CORE_OPPCHANGEDONE_EN_MASK	BITFIELD(23, 23)
+#define OMAP4430_VP_IVA_TRANXDONE_EN_MASK	BITFIELD(22, 22)
+#define OMAP4430_VP_IVA_EQVALUE_EN_MASK		BITFIELD(21, 21)
+#define OMAP4430_VP_IVA_NOSMPSACK_EN_MASK	BITFIELD(20, 20)
+#define OMAP4430_VP_IVA_MAXVDD_EN_MASK		BITFIELD(19, 19)
+#define OMAP4430_VP_IVA_MINVDD_EN_MASK		BITFIELD(18, 18)
+#define OMAP4430_VP_IVA_OPPCHANGEDONE_EN_MASK	BITFIELD(17, 17)
+#define OMAP4430_VP_MPU_TRANXDONE_EN_MASK	BITFIELD(16, 16)
+#define OMAP4430_VP_MPU_EQVALUE_EN_MASK		BITFIELD(15, 15)
+#define OMAP4430_VP_MPU_NOSMPSACK_EN_MASK	BITFIELD(14, 14)
+#define OMAP4430_VP_MPU_MAXVDD_EN_MASK		BITFIELD(13, 13)
+#define OMAP4430_VP_MPU_MINVDD_EN_MASK		BITFIELD(12, 12)
+#define OMAP4430_VP_MPU_OPPCHANGEDONE_EN_MASK	BITFIELD(11, 11)
+#define OMAP4430_IO_EN_MASK			BITFIELD(9, 9)
+#define OMAP4430_TRANSITION_EN_MASK		BITFIELD(8, 8)
+#define OMAP4430_DPLL_DDRPHY_RECAL_EN_MASK	BITFIELD(6, 6)
+#define OMAP4430_DPLL_USB_RECAL_EN_MASK		BITFIELD(5, 5)
+#define OMAP4430_DPLL_ABE_RECAL_EN_MASK		BITFIELD(4, 4)
+#define OMAP4430_DPLL_PER_RECAL_EN_MASK		BITFIELD(3, 3)
+#define OMAP4430_DPLL_IVA_RECAL_EN_MASK		BITFIELD(2, 2)
+#define OMAP4430_DPLL_MPU_RECAL_EN_MASK		BITFIELD(1, 1)
+#define OMAP4430_DPLL_CORE_RECAL_EN_MASK	BITFIELD(0, 0)
+#define OMAP4430_VC_TOERR_ST_MASK		BITFIELD(31, 31)
+#define OMAP4430_VC_RAERR_ST_MASK		BITFIELD(30, 30)
+#define OMAP4430_VC_SAERR_ST_MASK		BITFIELD(29, 29)
+#define OMAP4430_VP_CORE_TRANXDONE_ST_MASK	BITFIELD(28, 28)
+#define OMAP4430_VP_CORE_EQVALUE_ST_MASK	BITFIELD(27, 27)
+#define OMAP4430_VP_CORE_NOSMPSACK_ST_MASK	BITFIELD(26, 26)
+#define OMAP4430_VP_CORE_MAXVDD_ST_MASK		BITFIELD(25, 25)
+#define OMAP4430_VP_CORE_MINVDD_ST_MASK		BITFIELD(24, 24)
+#define OMAP4430_VP_CORE_OPPCHANGEDONE_ST_MASK	BITFIELD(23, 23)
+#define OMAP4430_VP_IVA_TRANXDONE_ST_MASK	BITFIELD(22, 22)
+#define OMAP4430_VP_IVA_EQVALUE_ST_MASK		BITFIELD(21, 21)
+#define OMAP4430_VP_IVA_NOSMPSACK_ST_MASK	BITFIELD(20, 20)
+#define OMAP4430_VP_IVA_MAXVDD_ST_MASK		BITFIELD(19, 19)
+#define OMAP4430_VP_IVA_MINVDD_ST_MASK		BITFIELD(18, 18)
+#define OMAP4430_VP_IVA_OPPCHANGEDONE_ST_MASK	BITFIELD(17, 17)
+#define OMAP4430_FORCEWKUP_ST_MASK		BITFIELD(10, 10)
+#define OMAP4430_DPLL_PER_RECAL_ST_MASK		BITFIELD(3, 3)
+#define OMAP4430_DPLL_IVA_RECAL_ST_MASK		BITFIELD(2, 2)
+#define OMAP4430_DPLL_CORE_RECAL_ST_MASK	BITFIELD(0, 0)
+#define OMAP4430_VC_TOERR_EN_MASK		BITFIELD(31, 31)
+#define OMAP4430_VC_RAERR_EN_MASK		BITFIELD(30, 30)
+#define OMAP4430_VC_SAERR_EN_MASK		BITFIELD(29, 29)
+#define OMAP4430_VP_CORE_TRANXDONE_EN_MASK	BITFIELD(28, 28)
+#define OMAP4430_VP_CORE_EQVALUE_EN_MASK	BITFIELD(27, 27)
+#define OMAP4430_VP_CORE_NOSMPSACK_EN_MASK	BITFIELD(26, 26)
+#define OMAP4430_VP_CORE_MAXVDD_EN_MASK		BITFIELD(25, 25)
+#define OMAP4430_VP_CORE_MINVDD_EN_MASK		BITFIELD(24, 24)
+#define OMAP4430_VP_CORE_OPPCHANGEDONE_EN_MASK	BITFIELD(23, 23)
+#define OMAP4430_VP_IVA_TRANXDONE_EN_MASK	BITFIELD(22, 22)
+#define OMAP4430_VP_IVA_EQVALUE_EN_MASK		BITFIELD(21, 21)
+#define OMAP4430_VP_IVA_NOSMPSACK_EN_MASK	BITFIELD(20, 20)
+#define OMAP4430_VP_IVA_MAXVDD_EN_MASK		BITFIELD(19, 19)
+#define OMAP4430_VP_IVA_MINVDD_EN_MASK		BITFIELD(18, 18)
+#define OMAP4430_VP_IVA_OPPCHANGEDONE_EN_MASK	BITFIELD(17, 17)
+#define OMAP4430_FORCEWKUP_EN_MASK		BITFIELD(10, 10)
+#define OMAP4430_DPLL_PER_RECAL_EN_MASK		BITFIELD(3, 3)
+#define OMAP4430_DPLL_IVA_RECAL_EN_MASK		BITFIELD(2, 2)
+#define OMAP4430_DPLL_CORE_RECAL_EN_MASK	BITFIELD(0, 0)
+#define OMAP4430_DPLL_ABE_RECAL_ST_MASK		BITFIELD(4, 4)
+#define OMAP4430_DPLL_IVA_RECAL_ST_MASK		BITFIELD(2, 2)
+#define OMAP4430_DPLL_ABE_RECAL_EN_MASK		BITFIELD(4, 4)
+#define OMAP4430_DPLL_IVA_RECAL_EN_MASK		BITFIELD(2, 2)
+#define OMAP4430_MODULEMODE_MASK		BITFIELD(1, 0)
+#define OMAP4430_WKUPDEP_SR_MPU_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_SR_IVA_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_SR_IVA_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_WKUPDEP_SR_CORE_DUCATI_MASK	BITFIELD(1, 1)
+#define OMAP4430_WKUPDEP_SR_CORE_MPU_MASK	BITFIELD(0, 0)
+#define OMAP4430_CAM_MEM_ONSTATE_MASK		BITFIELD(17, 16)
+#define OMAP4430_CAM_MEM_STATEST_MASK		BITFIELD(5, 4)
+#define OMAP4430_LOSTMEM_CAM_MEM_MASK		BITFIELD(8, 8)
+#define OMAP4430_LOSTMEM_CAM_MEM_MASK		BITFIELD(8, 8)
+#define OMAP4430_GFX_MEM_ONSTATE_MASK		BITFIELD(17, 16)
+#define OMAP4430_GFX_MEM_STATEST_MASK		BITFIELD(5, 4)
+#define OMAP4430_LOSTMEM_GFX_MEM_MASK		BITFIELD(8, 8)
+#define OMAP4430_EMU_BANK_ONSTATE_MASK		BITFIELD(17, 16)
+#define OMAP4430_EMU_BANK_STATEST_MASK		BITFIELD(5, 4)
+#define OMAP4430_LOSTMEM_EMU_BANK_MASK		BITFIELD(8, 8)
+#define OMAP4430_RST_GLOBAL_COLD_SW_MASK	BITFIELD(1, 1)
+#define OMAP4430_RST_GLOBAL_WARM_SW_MASK	BITFIELD(0, 0)
+#define OMAP4430_ICEPICK_RST_MASK		BITFIELD(9, 9)
+#define OMAP4430_VDD_CORE_VOLT_MGR_RST_MASK	BITFIELD(8, 8)
+#define OMAP4430_VDD_IVA_VOLT_MGR_RST_MASK	BITFIELD(7, 7)
+#define OMAP4430_VDD_MPU_VOLT_MGR_RST_MASK	BITFIELD(6, 6)
+#define OMAP4430_EXTERNAL_WARM_RST_MASK		BITFIELD(5, 5)
+#define OMAP4430_SECURE_WDT_RST_MASK		BITFIELD(4, 4)
+#define OMAP4430_MPU_WDT_RST_MASK		BITFIELD(3, 3)
+#define OMAP4430_MPU_SECURITY_VIOL_RST_MASK	BITFIELD(2, 2)
+#define OMAP4430_GLOBAL_WARM_SW_RST_MASK	BITFIELD(1, 1)
+#define OMAP4430_GLOBAL_COLD_RST_MASK		BITFIELD(0, 0)
+#define OMAP4430_RSTTIME2_MASK			BITFIELD(12, 8)
+#define OMAP4430_RSTTIME1_MASK			BITFIELD(7, 0)
+#define OMAP4430_CLKREQ_COND_MASK		BITFIELD(2, 0)
+#define OMAP4430_VDD_IVA_PRESENCE_MASK		BITFIELD(9, 9)
+#define OMAP4430_VDD_MPU_PRESENCE_MASK		BITFIELD(8, 8)
+#define OMAP4430_AUTO_CTRL_VDD_IVA_L_MASK	BITFIELD(5, 4)
+#define OMAP4430_AUTO_CTRL_VDD_MPU_L_MASK	BITFIELD(3, 2)
+#define OMAP4430_AUTO_CTRL_VDD_CORE_L_MASK	BITFIELD(1, 0)
+#define OMAP4430_PWRREQ_COND_MASK		BITFIELD(1, 0)
+#define OMAP4430_PONOUT_2_PGOODIN_TIME_MASK	BITFIELD(15, 8)
+#define OMAP4430_PCHARGE_TIME_MASK		BITFIELD(7, 0)
+#define OMAP4430_ISO_2_ON_TIME_MASK		BITFIELD(7, 0)
+#define OMAP4430_GLOBAL_WUEN_MASK		BITFIELD(16, 16)
+#define OMAP4430_WUCLK_STATUS_MASK		BITFIELD(9, 9)
+#define OMAP4430_WUCLK_CTRL_MASK		BITFIELD(8, 8)
+#define OMAP4430_ISOCLK_STATUS_MASK		BITFIELD(1, 1)
+#define OMAP4430_ISOCLK_OVERRIDE_MASK		BITFIELD(0, 0)
+#define OMAP4430_ERROROFFSET_MASK		BITFIELD(31, 24)
+#define OMAP4430_ERRORGAIN_MASK			BITFIELD(23, 16)
+#define OMAP4430_INITVOLTAGE_MASK		BITFIELD(15, 8)
+#define OMAP4430_TIMEOUTEN_MASK			BITFIELD(3, 3)
+#define OMAP4430_INITVDD_MASK			BITFIELD(2, 2)
+#define OMAP4430_FORCEUPDATE_MASK		BITFIELD(1, 1)
+#define OMAP4430_VPENABLE_MASK			BITFIELD(0, 0)
+#define OMAP4430_VPINIDLE_MASK			BITFIELD(0, 0)
+#define OMAP4430_VDDMAX_MASK			BITFIELD(31, 24)
+#define OMAP4430_VDDMIN_MASK			BITFIELD(23, 16)
+#define OMAP4430_TIMEOUT_MASK			BITFIELD(15, 0)
+#define OMAP4430_VPVOLTAGE_MASK			BITFIELD(7, 0)
+#define OMAP4430_SMPSWAITTIMEMAX_MASK		BITFIELD(23, 8)
+#define OMAP4430_VSTEPMAX_MASK			BITFIELD(7, 0)
+#define OMAP4430_SMPSWAITTIMEMIN_MASK		BITFIELD(23, 8)
+#define OMAP4430_VSTEPMIN_MASK			BITFIELD(7, 0)
+#define OMAP4430_PRM_VC_SMPS_SA_VDD_MPU_L_MASK	BITFIELD(22, 16)
+#define OMAP4430_PRM_VC_SMPS_SA_VDD_IVA_L_MASK	BITFIELD(14, 8)
+#define OMAP4430_PRM_VC_SMPS_SA_VDD_CORE_L_MASK	BITFIELD(6, 0)
+#define OMAP4430_VOLRA_VDD_MPU_L_MASK		BITFIELD(23, 16)
+#define OMAP4430_VOLRA_VDD_IVA_L_MASK		BITFIELD(15, 8)
+#define OMAP4430_VOLRA_VDD_CORE_L_MASK		BITFIELD(7, 0)
+#define OMAP4430_CMDRA_VDD_MPU_L_MASK		BITFIELD(23, 16)
+#define OMAP4430_CMDRA_VDD_IVA_L_MASK		BITFIELD(15, 8)
+#define OMAP4430_CMDRA_VDD_CORE_L_MASK		BITFIELD(7, 0)
+#define OMAP4430_ON_MASK			BITFIELD(31, 24)
+#define OMAP4430_ONLP_MASK			BITFIELD(23, 16)
+#define OMAP4430_RET_MASK			BITFIELD(15, 8)
+#define OMAP4430_OFF_MASK			BITFIELD(7, 0)
+#define OMAP4430_VALID_MASK			BITFIELD(24, 24)
+#define OMAP4430_DATA_MASK			BITFIELD(23, 16)
+#define OMAP4430_REGADDR_MASK			BITFIELD(15, 8)
+#define OMAP4430_SLAVEADDR_MASK			BITFIELD(6, 0)
+#define OMAP4430_RACEN_VDD_MPU_L_MASK		BITFIELD(20, 20)
+#define OMAP4430_RAC_VDD_MPU_L_MASK		BITFIELD(19, 19)
+#define OMAP4430_RAV_VDD_MPU_L_MASK		BITFIELD(18, 18)
+#define OMAP4430_CMD_VDD_MPU_L_MASK		BITFIELD(17, 17)
+#define OMAP4430_PRM_VC_CFG_CHANNEL_SA_VDD_MPU_L_MASK	BITFIELD(16, 16)
+#define OMAP4430_CMD_VDD_IVA_L_MASK		BITFIELD(12, 12)
+#define OMAP4430_RACEN_VDD_IVA_L_MASK		BITFIELD(11, 11)
+#define OMAP4430_RAC_VDD_IVA_L_MASK		BITFIELD(10, 10)
+#define OMAP4430_RAV_VDD_IVA_L_MASK		BITFIELD(9, 9)
+#define OMAP4430_PRM_VC_CFG_CHANNEL_SA_VDD_IVA_L_MASK	BITFIELD(8, 8)
+#define OMAP4430_CMD_VDD_CORE_L_MASK		BITFIELD(4, 4)
+#define OMAP4430_RACEN_VDD_CORE_L_MASK		BITFIELD(3, 3)
+#define OMAP4430_RAC_VDD_CORE_L_MASK		BITFIELD(2, 2)
+#define OMAP4430_RAV_VDD_CORE_L_MASK		BITFIELD(1, 1)
+#define OMAP4430_PRM_VC_CFG_CHANNEL_SA_VDD_CORE_L_MASK	BITFIELD(0, 0)
+#define OMAP4430_DFILTEREN_MASK			BITFIELD(6, 6)
+#define OMAP4430_HSMASTER_MASK			BITFIELD(5, 5)
+#define OMAP4430_SRMODEEN_MASK			BITFIELD(4, 4)
+#define OMAP4430_HSMODEEN_MASK			BITFIELD(3, 3)
+#define OMAP4430_HSMCODE_MASK			BITFIELD(2, 0)
+#define OMAP4430_HSSCLL_MASK			BITFIELD(31, 24)
+#define OMAP4430_HSSCLH_MASK			BITFIELD(23, 16)
+#define OMAP4430_SCLL_MASK			BITFIELD(15, 8)
+#define OMAP4430_SCLH_MASK			BITFIELD(7, 0)
+#define OMAP4430_SLPCNT_VALUE_MASK		BITFIELD(23, 16)
+#define OMAP4430_VSETUPCNT_VALUE_MASK		BITFIELD(15, 8)
+#define OMAP4430_PCHARGECNT_VALUE_MASK		BITFIELD(5, 0)
+#define OMAP4430_ENABLE_RTA_EXPORT_MASK		BITFIELD(0, 0)
+#define OMAP4430_AIPOFF_MASK			BITFIELD(8, 8)
+#define OMAP4430_ENFUNC5_MASK			BITFIELD(7, 7)
+#define OMAP4430_ENFUNC4_MASK			BITFIELD(6, 6)
+#define OMAP4430_ENFUNC3_MASK			BITFIELD(5, 5)
+#define OMAP4430_ENFUNC2_EXPORT_MASK		BITFIELD(4, 4)
+#define OMAP4430_ENFUNC1_MASK			BITFIELD(3, 3)
+#define OMAP4430_ABBOFF_SLEEP_EXPORT_MASK	BITFIELD(2, 2)
+#define OMAP4430_ABBOFF_ACT_EXPORT_MASK		BITFIELD(1, 1)
+#define OMAP4430_SRAM_IN_TRANSITION_MASK	BITFIELD(9, 9)
+#define OMAP4430_SRAMLDO_STATUS_MASK		BITFIELD(8, 8)
+#define OMAP4430_RETMODE_ENABLE_MASK		BITFIELD(0, 0)
+#define OMAP4430_SRAM_IN_TRANSITION_MASK	BITFIELD(9, 9)
+#define OMAP4430_SRAMLDO_STATUS_MASK		BITFIELD(8, 8)
+#define OMAP4430_RETMODE_ENABLE_MASK		BITFIELD(0, 0)
+#define OMAP4430_SRAM_IN_TRANSITION_MASK	BITFIELD(9, 9)
+#define OMAP4430_SRAMLDO_STATUS_MASK		BITFIELD(8, 8)
+#define OMAP4430_RETMODE_ENABLE_MASK		BITFIELD(0, 0)
+#define OMAP4430_SR2_WTCNT_VALUE_MASK		BITFIELD(15, 8)
+#define OMAP4430_NOCAP_EXPORT_MASK		BITFIELD(4, 4)
+#define OMAP4430_SLEEP_RBB_SEL_MASK		BITFIELD(3, 3)
+#define OMAP4430_ACTIVE_FBB_SEL_MASK		BITFIELD(2, 2)
+#define OMAP4430_ACTIVE_RBB_SEL_MASK		BITFIELD(1, 1)
+#define OMAP4430_SR2EN_MASK			BITFIELD(0, 0)
+#define OMAP4430_SR2_IN_TRANSITION_MASK		BITFIELD(6, 6)
+#define OMAP4430_SR2_STATUS_MASK		BITFIELD(4, 3)
+#define OMAP4430_OPP_CHANGE_MASK		BITFIELD(2, 2)
+#define OMAP4430_OPP_SEL_MASK			BITFIELD(1, 0)
+#define OMAP4430_NOCAP_EXPORT_MASK		BITFIELD(4, 4)
+#define OMAP4430_SLEEP_RBB_SEL_MASK		BITFIELD(3, 3)
+#define OMAP4430_ACTIVE_FBB_SEL_MASK		BITFIELD(2, 2)
+#define OMAP4430_ACTIVE_RBB_SEL_MASK		BITFIELD(1, 1)
+#define OMAP4430_CBIASSEL_MASK			BITFIELD(0, 0)
+#define OMAP4430_DEVICE_OFF_ENABLE_MASK		BITFIELD(0, 0)
+#define OMAP4430_PHASE2B_COMPLETED_MASK		BITFIELD(2, 2)
+#define OMAP4430_PHASE2A_COMPLETED_MASK		BITFIELD(1, 1)
+#define OMAP4430_PHASE1_COMPLETED_MASK		BITFIELD(0, 0)
+#define OMAP4430_PHASE1_CNDP_MASK		BITFIELD(31, 0)
+#define OMAP4430_PHASE2A_CNDP_MASK		BITFIELD(31, 0)
+#define OMAP4430_PHASE2B_CNDP_MASK		BITFIELD(31, 0)
+#define OMAP4430_MODEM_SLEEP_ST_MASK		BITFIELD(16, 16)
+#define OMAP4430_MODEM_SHUTDOWN_IRQ_MASK	BITFIELD(9, 9)
+#define OMAP4430_MODEM_WAKE_IRQ_MASK		BITFIELD(8, 8)
+#define OMAP4430_MODEM_READY_MASK		BITFIELD(1, 1)
+#define OMAP4430_WAKE_MODEM_MASK		BITFIELD(0, 0)
+#endif /* __ARCH_ARM_MACH_OMAP2_PRM_REG	BITS_44XX_H */