From patchwork Fri Oct 2 18:14:53 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 51407 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n92IF0du010864 for ; Fri, 2 Oct 2009 18:15:03 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758024AbZJBSO6 (ORCPT ); Fri, 2 Oct 2009 14:14:58 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1758020AbZJBSO6 (ORCPT ); Fri, 2 Oct 2009 14:14:58 -0400 Received: from mail-px0-f179.google.com ([209.85.216.179]:43925 "EHLO mail-px0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757992AbZJBSO5 (ORCPT ); Fri, 2 Oct 2009 14:14:57 -0400 Received: by pxi9 with SMTP id 9so1347643pxi.4 for ; Fri, 02 Oct 2009 11:15:01 -0700 (PDT) Received: by 10.114.162.38 with SMTP id k38mr4148297wae.138.1254507301621; Fri, 02 Oct 2009 11:15:01 -0700 (PDT) Received: from localhost ([216.254.16.51]) by mx.google.com with ESMTPS id 21sm786664pzk.15.2009.10.02.11.15.00 (version=TLSv1/SSLv3 cipher=RC4-MD5); Fri, 02 Oct 2009 11:15:01 -0700 (PDT) From: Kevin Hilman To: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Paul Walmsley Subject: [PATCH 3/5] OMAP3: PM: PRCM interrupt: only handle selected PRCM interrupts Date: Fri, 2 Oct 2009 11:14:53 -0700 Message-Id: <1254507295-11381-4-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.6.4.3 In-Reply-To: <1254507295-11381-3-git-send-email-khilman@deeprootsystems.com> References: <1254507295-11381-1-git-send-email-khilman@deeprootsystems.com> <1254507295-11381-2-git-send-email-khilman@deeprootsystems.com> <1254507295-11381-3-git-send-email-khilman@deeprootsystems.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 0e7bd8e..d9440a1 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -61,7 +61,7 @@ static struct powerdomain *mpu_pwrdm; * that any peripheral wake-up events occurring while attempting to * clear the PM_WKST_x are detected and cleared. */ -static void prcm_clear_mod_irqs(s16 module, u8 regs) +static int prcm_clear_mod_irqs(s16 module, u8 regs) { u32 wkst, fclk, iclk; u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; @@ -69,6 +69,7 @@ static void prcm_clear_mod_irqs(s16 module, u8 regs) u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1; u16 grpsel_off = (regs == 3) ? OMAP3430ES2_PM_MPUGRPSEL3 : OMAP3430_PM_MPUGRPSEL; + int c = 0; wkst = prm_read_mod_reg(module, wkst_off); wkst &= prm_read_mod_reg(module, grpsel_off); @@ -80,10 +81,28 @@ static void prcm_clear_mod_irqs(s16 module, u8 regs) cm_set_mod_reg_bits(wkst, module, fclk_off); prm_write_mod_reg(wkst, module, wkst_off); wkst = prm_read_mod_reg(module, wkst_off); + c++; } cm_write_mod_reg(iclk, module, iclk_off); cm_write_mod_reg(fclk, module, fclk_off); } + + return c; +} + +static int _prcm_int_handle_wakeup(void) +{ + int c; + + c = prcm_clear_mod_irqs(WKUP_MOD, 1); + c += prcm_clear_mod_irqs(CORE_MOD, 1); + c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1); + if (omap_rev() > OMAP3430_REV_ES1_0) { + c += prcm_clear_mod_irqs(CORE_MOD, 3); + c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1); + } + + return c; } /* @@ -106,18 +125,27 @@ static void prcm_clear_mod_irqs(s16 module, u8 regs) static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id) { u32 irqstatus_mpu; + int c = 0; do { - prcm_clear_mod_irqs(WKUP_MOD, 1); - prcm_clear_mod_irqs(CORE_MOD, 1); - prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1); - if (omap_rev() > OMAP3430_REV_ES1_0) { - prcm_clear_mod_irqs(CORE_MOD, 3); - prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1); - } - irqstatus_mpu = prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + + if (irqstatus_mpu & (OMAP3430_WKUP_ST | OMAP3430_IO_ST)) { + c = _prcm_int_handle_wakeup(); + + /* + * Is the MPU PRCM interrupt handler racing with the + * IVA2 PRCM interrupt handler ? + */ + WARN(c == 0, "prcm: WARNING: PRCM indicated MPU wakeup " + "but no wakeup sources are marked\n"); + } else { + /* XXX we need to expand our PRCM interrupt handler */ + WARN(1, "prcm: WARNING: PRCM interrupt received, but " + "no code to handle it (%08x)\n", irqstatus_mpu); + } + prm_write_mod_reg(irqstatus_mpu, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);