From patchwork Wed Oct 14 21:57:54 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 53861 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n9EM3aAN028146 for ; Wed, 14 Oct 2009 22:03:41 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761409AbZJNV7p (ORCPT ); Wed, 14 Oct 2009 17:59:45 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1761368AbZJNV7o (ORCPT ); Wed, 14 Oct 2009 17:59:44 -0400 Received: from mail-pz0-f188.google.com ([209.85.222.188]:58950 "EHLO mail-pz0-f188.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761391AbZJNV7n (ORCPT ); Wed, 14 Oct 2009 17:59:43 -0400 Received: by pzk26 with SMTP id 26so195703pzk.4 for ; Wed, 14 Oct 2009 14:58:32 -0700 (PDT) Received: by 10.115.113.4 with SMTP id q4mr16145540wam.54.1255557511888; Wed, 14 Oct 2009 14:58:31 -0700 (PDT) Received: from localhost ([216.254.16.51]) by mx.google.com with ESMTPS id 22sm780958pzk.6.2009.10.14.14.58.31 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 14 Oct 2009 14:58:31 -0700 (PDT) From: Kevin Hilman To: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Rajendra Nayak Subject: [PATCH 11/27] OMAP3: PM: CORE domain off-mode support Date: Wed, 14 Oct 2009 14:57:54 -0700 Message-Id: <1255557490-16787-12-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.6.4.3 In-Reply-To: <1255557490-16787-11-git-send-email-khilman@deeprootsystems.com> References: <1255557490-16787-1-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-2-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-3-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-4-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-5-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-6-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-7-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-8-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-9-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-10-git-send-email-khilman@deeprootsystems.com> <1255557490-16787-11-git-send-email-khilman@deeprootsystems.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 4eef146..b1d90e5 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -5,6 +5,9 @@ * Tony Lindgren * Jouni Hogander * + * Copyright (C) 2007 Texas Instruments, Inc. + * Rajendra Nayak + * * Copyright (C) 2005 Texas Instruments, Inc. * Richard Woodruff * @@ -24,11 +27,13 @@ #include #include +#include #include #include #include #include #include +#include #include @@ -39,6 +44,11 @@ #include "prm.h" #include "pm.h" +/* Scratchpad offsets */ +#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31 +#define OMAP343X_TABLE_VALUE_OFFSET 0x30 +#define OMAP343X_CONTROL_REG_VALUE_OFFSET 0x32 + struct power_state { struct powerdomain *pwrdm; u32 next_state; @@ -57,6 +67,46 @@ static struct powerdomain *core_pwrdm, *per_pwrdm; static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state); +static inline void omap3_per_save_context(void) +{ + omap3_gpio_save_context(); +} + +static inline void omap3_per_restore_context(void) +{ + omap3_gpio_restore_context(); +} + +static void omap3_core_save_context(void) +{ + u32 control_padconf_off; + + /* Save the padconf registers */ + control_padconf_off = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF); + control_padconf_off |= START_PADCONF_SAVE; + omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); + /* wait for the save to complete */ + while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) + & PADCONF_SAVE_DONE) + ; + /* Save the Interrupt controller context */ + omap3_intc_save_context(); + /* Save the GPMC context */ + omap3_gpmc_save_context(); + /* Save the system control module context, padconf already save above*/ + omap3_control_save_context(); +} + +static void omap3_core_restore_context(void) +{ + /* Restore the control module context, padconf restored by h/w */ + omap3_control_restore_context(); + /* Restore the GPMC context */ + omap3_gpmc_restore_context(); + /* Restore the interrupt controller context */ + omap3_intc_restore_context(); +} + /* * PRCM Interrupt Handler Helper Function * @@ -208,6 +258,7 @@ static void omap_sram_idle(void) int mpu_next_state = PWRDM_POWER_ON; int per_next_state = PWRDM_POWER_ON; int core_next_state = PWRDM_POWER_ON; + int core_prev_state, per_prev_state; if (!_omap_sram_idle) return; @@ -246,8 +297,15 @@ static void omap_sram_idle(void) omap_uart_prepare_idle(1); /* PER changes only with core */ per_next_state = pwrdm_read_next_pwrst(per_pwrdm); - if (per_next_state < PWRDM_POWER_ON) + if (per_next_state < PWRDM_POWER_ON) { omap_uart_prepare_idle(2); + if (per_next_state == PWRDM_POWER_OFF) + omap3_per_save_context(); + } + if (core_next_state == PWRDM_POWER_OFF) { + omap3_core_save_context(); + omap3_prcm_save_context(); + } /* Enable IO-PAD wakeup */ prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN); } @@ -272,6 +330,18 @@ static void omap_sram_idle(void) /* Disable IO-PAD wakeup */ prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN); + core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm); + if (core_prev_state == PWRDM_POWER_OFF) { + omap3_core_restore_context(); + omap3_prcm_restore_context(); + omap3_sram_restore_context(); + } + if (per_next_state < PWRDM_POWER_ON) { + per_prev_state = + pwrdm_read_prev_pwrst(per_pwrdm); + if (per_prev_state == PWRDM_POWER_OFF) + omap3_per_restore_context(); + } omap2_gpio_resume_after_retention(); } @@ -842,6 +912,7 @@ static int __init omap3_pm_init(void) /* XXX prcm_setup_regs needs to be before enabling hw * supervised mode for powerdomains */ prcm_setup_regs(); + omap3_save_scratchpad_contents(); ret = request_irq(INT_34XX_PRCM_MPU_IRQ, (irq_handler_t)prcm_interrupt_handler, diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h index a943014..22f04f8 100644 --- a/arch/arm/plat-omap/include/mach/sram.h +++ b/arch/arm/plat-omap/include/mach/sram.h @@ -27,6 +27,7 @@ extern u32 omap3_configure_core_dpll( u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); +extern void omap3_sram_restore_context(void); /* Do not use these */ extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);