From patchwork Fri Oct 16 10:49:08 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 54230 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n9GB8hRe026877 for ; Fri, 16 Oct 2009 11:08:45 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758582AbZJPLEu (ORCPT ); Fri, 16 Oct 2009 07:04:50 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1758580AbZJPLEu (ORCPT ); Fri, 16 Oct 2009 07:04:50 -0400 Received: from smtp.nokia.com ([192.100.105.134]:19653 "EHLO mgw-mx09.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758543AbZJPLEt (ORCPT ); Fri, 16 Oct 2009 07:04:49 -0400 Received: from esebh106.NOE.Nokia.com (esebh106.ntc.nokia.com [172.21.138.213]) by mgw-mx09.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id n9GB3L2D010020 for ; Fri, 16 Oct 2009 06:03:22 -0500 Received: from vaebh104.NOE.Nokia.com ([10.160.244.30]) by esebh106.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 16 Oct 2009 14:03:01 +0300 Received: from mgw-sa02.ext.nokia.com ([147.243.1.48]) by vaebh104.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 16 Oct 2009 14:03:01 +0300 Received: from localhost.localdomain (sokoban.ntc.nokia.com [172.22.144.95]) by mgw-sa02.ext.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id n9GB2fa9022261 for ; Fri, 16 Oct 2009 14:03:00 +0300 From: Tero Kristo To: linux-omap@vger.kernel.org Subject: [PATCH 15/17] OMAP3: PM: Added support for L2 aux ctrl register save and restore Date: Fri, 16 Oct 2009 13:49:08 +0300 Message-Id: <1255690150-16853-16-git-send-email-tero.kristo@nokia.com> X-Mailer: git-send-email 1.5.4.3 In-Reply-To: <1255690150-16853-15-git-send-email-tero.kristo@nokia.com> References: <> <1255690150-16853-1-git-send-email-tero.kristo@nokia.com> <1255690150-16853-2-git-send-email-tero.kristo@nokia.com> <1255690150-16853-3-git-send-email-tero.kristo@nokia.com> <1255690150-16853-4-git-send-email-tero.kristo@nokia.com> <1255690150-16853-5-git-send-email-tero.kristo@nokia.com> <1255690150-16853-6-git-send-email-tero.kristo@nokia.com> <1255690150-16853-7-git-send-email-tero.kristo@nokia.com> <1255690150-16853-8-git-send-email-tero.kristo@nokia.com> <1255690150-16853-9-git-send-email-tero.kristo@nokia.com> <1255690150-16853-10-git-send-email-tero.kristo@nokia.com> <1255690150-16853-11-git-send-email-tero.kristo@nokia.com> <1255690150-16853-12-git-send-email-tero.kristo@nokia.com> <1255690150-16853-13-git-send-email-tero.kristo@nokia.com> <1255690150-16853-14-git-send-email-tero.kristo@nokia.com> <1255690150-16853-15-git-send-email-tero.kristo@nokia.com> X-OriginalArrivalTime: 16 Oct 2009 11:03:01.0317 (UTC) FILETIME=[3A227F50:01CA4E50] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 730fc53..82d8f1a 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -95,6 +95,7 @@ void *omap3_secure_ram_storage; */ u32 omap3_arm_context[128]; u32 omap3_aux_ctrl[2] = { 0x1, 0x0 }; +u32 omap3_l2_aux_ctrl[2] = { 0x1, 0x0 }; struct omap3_control_regs { u32 sysconfig; diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 0b03bf9..e291d6d 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -288,11 +288,30 @@ restore: mcr p15, 0, r0, c7, c10, 5 @ data memory barrier .word 0xE1600071 @ call SMI monitor (smi #1) +#ifdef CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE + /* Restore L2 aux control register */ + @ set service ID for PPA + mov r0, #CONFIG_OMAP3_L2_AUX_SECURE_SERVICE_SET_ID + mov r12, r0 @ copy service ID in r12 + mov r1, #0 @ set task ID for ROM code in r1 + mov r2, #4 @ set some flags in r2, r6 + mov r6, #0xff + ldr r3, write_l2_aux_control_params @ r3 points to parameters + ldr r4, phys_offset + adds r3, r3, r4 + ldr r4, page_offset + subs r3, r3, r4 + mcr p15, 0, r0, c7, c10, 4 @ data write barrier + mcr p15, 0, r0, c7, c10, 5 @ data memory barrier + .word 0xE1600071 @ call SMI monitor (smi #1) +#endif b logic_l1_restore l2_inv_api_params: .word 0x1, 0x00 write_aux_control_params: .word omap3_aux_ctrl +write_l2_aux_control_params: + .word omap3_l2_aux_ctrl l2_inv_gp: /* Execute smi to invalidate L2 cache */ mov r12, #0x1 @ set up to invalide L2 @@ -306,6 +325,15 @@ smi: .word 0xE1600070 @ Call SMI monitor (smieq) ldr r0, [r1, #4] mov r12, #0x3 .word 0xE1600070 @ Call SMI monitor (smieq) + /* Restore L2 AUX control register */ + ldr r1, write_l2_aux_control_params + ldr r0, phys_offset + adds r1, r1, r0 + ldr r0, page_offset + subs r1, r1, r0 + ldr r0, [r1, #4] + mov r12, #0x2 + .word 0xE1600070 @ Call SMI monitor (smieq) logic_l1_restore: mov r1, #0 /* Invalidate all instruction caches to PoU @@ -433,6 +461,9 @@ save_context_wfi: mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary Control Register ldr r5, write_aux_control_params str r4, [r5, #4] + mrc p15, 1, r4, c9, c0, 2 @ Read L2 AUX ctrl register + ldr r5, write_l2_aux_control_params + str r4, [r5, #4] /* Check what that target sleep state is:stored in r1*/ /* 1 - Only L1 and logic lost */ /* 2 - Only L2 lost */ diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 2143db5..3ff1a5f 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -185,6 +185,23 @@ config OMAP3_DEBOBS help Use ETK pads for debug observability +config OMAP3_L2_AUX_SECURE_SAVE_RESTORE + bool "OMAP3 HS/EMU save and restore for L2 AUX control register" + depends on ARCH_OMAP3 && PM + default n + help + Without this option, L2 Auxiliary control register contents are + lost during off-mode entry on HS/EMU devices. This feature + requires support from PPA / boot-loader in HS/EMU devices, which + currently does not exist by default. + +config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID + int "Service ID for the support routine to set L2 AUX control" + depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE + default 43 + help + PPA routine service ID for setting L2 auxiliary control register. + config OMAP_32K_TIMER_HZ int "Kernel internal timer frequency for 32KHz timer" range 32 1024