From patchwork Thu Nov 26 11:14:47 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 63138 X-Patchwork-Delegate: paul@pwsan.com Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id nAQBEuR0016698 for ; Thu, 26 Nov 2009 11:14:56 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759287AbZKZLOs (ORCPT ); Thu, 26 Nov 2009 06:14:48 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1759203AbZKZLOs (ORCPT ); Thu, 26 Nov 2009 06:14:48 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:59627 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753953AbZKZLOs (ORCPT ); Thu, 26 Nov 2009 06:14:48 -0500 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id nAQBEo8Q009891 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 26 Nov 2009 05:14:53 -0600 Received: from linfarm476.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id nAQBEmpx026364; Thu, 26 Nov 2009 16:44:48 +0530 (IST) Received: from linfarm476.india.ti.com (localhost [127.0.0.1]) by linfarm476.india.ti.com (8.12.11/8.12.11) with ESMTP id nAQBElek010194; Thu, 26 Nov 2009 16:44:47 +0530 Received: (from a0393109@localhost) by linfarm476.india.ti.com (8.12.11/8.12.11/Submit) id nAQBElCH010181; Thu, 26 Nov 2009 16:44:47 +0530 From: Thara Gopinath To: linux-omap@vger.kernel.org Cc: Thara Gopinath , Kevin Hilman Subject: [PATCH V2] OMAP3: PM: Fix for MPU power domain MEM BANK position Date: Thu, 26 Nov 2009 16:44:47 +0530 Message-Id: <1259234087-10030-1-git-send-email-thara@ti.com> X-Mailer: git-send-email 1.5.5 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index b6990e3..1af447e 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -985,6 +985,9 @@ int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) if (pwrdm->banks < (bank + 1)) return -EEXIST; + if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK) + bank = 1; + /* * The register bit names below may not correspond to the * actual names of the bits in each powerdomain's register, @@ -1032,6 +1035,9 @@ int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) if (pwrdm->banks < (bank + 1)) return -EEXIST; + if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK) + bank = 1; + /* * The register bit names below may not correspond to the * actual names of the bits in each powerdomain's register, diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h index fd09b08..588f7e0 100644 --- a/arch/arm/mach-omap2/powerdomains34xx.h +++ b/arch/arm/mach-omap2/powerdomains34xx.h @@ -190,6 +190,7 @@ static struct powerdomain mpu_34xx_pwrdm = { .wkdep_srcs = mpu_34xx_wkdeps, .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, + .flags = PWRDM_HAS_MPU_QUIRK, .banks = 1, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index 3d45ee1..ad070a6 100644 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h @@ -40,7 +40,10 @@ /* Powerdomain flags */ #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ - +#define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits + * in MEM bank 1 position. This is + * true for OMAP3430 + */ /* * Number of memory banks that are power-controllable. On OMAP3430, the