From patchwork Fri Jan 22 17:55:45 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 74683 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o0MG5gl6022581 for ; Fri, 22 Jan 2010 16:05:43 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755761Ab0AVQF2 (ORCPT ); Fri, 22 Jan 2010 11:05:28 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755748Ab0AVQF1 (ORCPT ); Fri, 22 Jan 2010 11:05:27 -0500 Received: from smtp.nokia.com ([192.100.105.134]:59822 "EHLO mgw-mx09.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755691Ab0AVQFZ (ORCPT ); Fri, 22 Jan 2010 11:05:25 -0500 Received: from esebh105.NOE.Nokia.com (esebh105.ntc.nokia.com [172.21.138.211]) by mgw-mx09.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o0MG5DUi020487 for ; Fri, 22 Jan 2010 10:05:23 -0600 Received: from esebh102.NOE.Nokia.com ([172.21.138.183]) by esebh105.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 22 Jan 2010 18:05:07 +0200 Received: from mgw-da01.ext.nokia.com ([147.243.128.24]) by esebh102.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 22 Jan 2010 18:05:06 +0200 Received: from localhost.localdomain (sokoban.nmp.nokia.com [172.22.215.13]) by mgw-da01.ext.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o0MG51XK002591 for ; Fri, 22 Jan 2010 18:05:04 +0200 From: Tero Kristo To: linux-omap@vger.kernel.org Subject: [PATCHv4 2/8] OMAP: Powerdomains: Add support for INACTIVE state on pwrdm level Date: Fri, 22 Jan 2010 19:55:45 +0200 Message-Id: <1264182951-9205-3-git-send-email-tero.kristo@nokia.com> X-Mailer: git-send-email 1.5.4.3 In-Reply-To: <1264182951-9205-2-git-send-email-tero.kristo@nokia.com> References: <> <1264182951-9205-1-git-send-email-tero.kristo@nokia.com> <1264182951-9205-2-git-send-email-tero.kristo@nokia.com> X-OriginalArrivalTime: 22 Jan 2010 16:05:06.0998 (UTC) FILETIME=[AA5D6D60:01CA9B7C] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 26b3f3e..bdfbbea 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -110,8 +110,8 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) { - int prev; - int state; + u8 prev; + u8 state; if (pwrdm == NULL) return -EINVAL; @@ -218,7 +218,9 @@ int pwrdm_register(struct powerdomain *pwrdm) pr_debug("powerdomain: registered %s\n", pwrdm->name); ret = 0; - + pwrdm->next_state = + prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTCTRL, + OMAP_POWERSTATE_MASK); pr_unlock: write_unlock_irqrestore(&pwrdm_rwlock, flags); @@ -699,19 +701,43 @@ int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm) */ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { + u8 prg_pwrst; + if (!pwrdm) return -EINVAL; + if (pwrdm->next_state == pwrst) + return 0; + if (!(pwrdm->pwrsts & (1 << pwrst))) return -EINVAL; pr_debug("powerdomain: setting next powerstate for %s to %0x\n", pwrdm->name, pwrst); + /* INACTIVE is reserved, so we program pwrdm as ON */ + if (pwrst == PWRDM_POWER_INACTIVE) + prg_pwrst = PWRDM_POWER_ON; + else + prg_pwrst = pwrst; + prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), + (prg_pwrst << OMAP_POWERSTATE_SHIFT), pwrdm->prcm_offs, PM_PWSTCTRL); + /* If next state is ON, prevent idle */ + if (pwrst == PWRDM_POWER_ON) { + if (omap2_clkdm_get_hwsup(pwrdm->pwrdm_clkdms[0])) { + omap2_clkdm_deny_idle(pwrdm->pwrdm_clkdms[0]); + pwrdm->hwsup_changed = 1; + } + } else if (pwrdm->hwsup_changed) { + omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); + pwrdm->hwsup_changed = 0; + } + + pwrdm->next_state = pwrst; + return 0; } @@ -728,8 +754,7 @@ int pwrdm_read_next_pwrst(struct powerdomain *pwrdm) if (!pwrdm) return -EINVAL; - return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTCTRL, - OMAP_POWERSTATE_MASK); + return pwrdm->next_state; } /** diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h index 588f7e0..7a7d8d3 100644 --- a/arch/arm/mach-omap2/powerdomains34xx.h +++ b/arch/arm/mach-omap2/powerdomains34xx.h @@ -165,7 +165,7 @@ static struct powerdomain iva2_pwrdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT, .wkdep_srcs = iva2_wkdeps, - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 4, .pwrsts_mem_ret = { @@ -188,7 +188,7 @@ static struct powerdomain mpu_34xx_pwrdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .dep_bit = OMAP3430_EN_MPU_SHIFT, .wkdep_srcs = mpu_34xx_wkdeps, - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .flags = PWRDM_HAS_MPU_QUIRK, .banks = 1, @@ -207,7 +207,7 @@ static struct powerdomain core_34xx_pre_es3_1_pwrdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 | CHIP_IS_OMAP3430ES2 | CHIP_IS_OMAP3430ES3_0), - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .dep_bit = OMAP3430_EN_CORE_SHIFT, .banks = 2, .pwrsts_mem_ret = { @@ -225,7 +225,7 @@ static struct powerdomain core_34xx_es3_1_pwrdm = { .name = "core_pwrdm", .prcm_offs = CORE_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1), - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .dep_bit = OMAP3430_EN_CORE_SHIFT, .flags = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */ .banks = 2, @@ -247,7 +247,7 @@ static struct powerdomain dss_pwrdm = { .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT, .wkdep_srcs = cam_dss_wkdeps, .sleepdep_srcs = dss_per_usbhost_sleepdeps, - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .pwrsts_logic_ret = PWRDM_POWER_RET, .banks = 1, .pwrsts_mem_ret = { @@ -287,7 +287,7 @@ static struct powerdomain cam_pwrdm = { .prcm_offs = OMAP3430_CAM_MOD, .wkdep_srcs = cam_dss_wkdeps, .sleepdep_srcs = cam_gfx_sleepdeps, - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .pwrsts_logic_ret = PWRDM_POWER_RET, .banks = 1, .pwrsts_mem_ret = { @@ -305,7 +305,7 @@ static struct powerdomain per_pwrdm = { .dep_bit = OMAP3430_EN_PER_SHIFT, .wkdep_srcs = per_usbhost_wkdeps, .sleepdep_srcs = dss_per_usbhost_sleepdeps, - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, .pwrsts_mem_ret = { @@ -327,7 +327,7 @@ static struct powerdomain neon_pwrdm = { .prcm_offs = OMAP3430_NEON_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .wkdep_srcs = neon_wkdeps, - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .pwrsts_logic_ret = PWRDM_POWER_RET, }; @@ -337,7 +337,7 @@ static struct powerdomain usbhost_pwrdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), .wkdep_srcs = per_usbhost_wkdeps, .sleepdep_srcs = dss_per_usbhost_sleepdeps, - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_OFF_RET_INA_ON, .pwrsts_logic_ret = PWRDM_POWER_RET, /* * REVISIT: Enabling usb host save and restore mechanism seems to diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index 0b96005..17377c3 100644 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h @@ -39,6 +39,9 @@ #define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON)) +#define PWRSTS_OFF_RET_INA_ON (PWRSTS_OFF_RET_ON | \ + (1 << PWRDM_POWER_INACTIVE)) + /* Powerdomain flags */ #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ @@ -123,6 +126,8 @@ struct powerdomain { struct list_head node; int state; + int next_state; + int hwsup_changed; unsigned state_counter[PWRDM_MAX_PWRSTS]; #ifdef CONFIG_PM_DEBUG