From patchwork Fri Jan 22 17:55:47 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 74681 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o0MG5gl4022581 for ; Fri, 22 Jan 2010 16:05:43 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755744Ab0AVQFZ (ORCPT ); Fri, 22 Jan 2010 11:05:25 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755525Ab0AVQFX (ORCPT ); Fri, 22 Jan 2010 11:05:23 -0500 Received: from smtp.nokia.com ([192.100.122.230]:21279 "EHLO mgw-mx03.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755691Ab0AVQFT (ORCPT ); Fri, 22 Jan 2010 11:05:19 -0500 Received: from vaebh106.NOE.Nokia.com (vaebh106.europe.nokia.com [10.160.244.32]) by mgw-mx03.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o0MG4xu7000328 for ; Fri, 22 Jan 2010 18:05:16 +0200 Received: from esebh102.NOE.Nokia.com ([172.21.138.183]) by vaebh106.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 22 Jan 2010 18:05:08 +0200 Received: from mgw-da01.ext.nokia.com ([147.243.128.24]) by esebh102.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 22 Jan 2010 18:05:08 +0200 Received: from localhost.localdomain (sokoban.nmp.nokia.com [172.22.215.13]) by mgw-da01.ext.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o0MG51XM002591 for ; Fri, 22 Jan 2010 18:05:06 +0200 From: Tero Kristo To: linux-omap@vger.kernel.org Subject: [PATCHv4 4/8] OMAP3: CPUidle: Fixed support for ON / INACTIVE states Date: Fri, 22 Jan 2010 19:55:47 +0200 Message-Id: <1264182951-9205-5-git-send-email-tero.kristo@nokia.com> X-Mailer: git-send-email 1.5.4.3 In-Reply-To: <1264182951-9205-4-git-send-email-tero.kristo@nokia.com> References: <> <1264182951-9205-1-git-send-email-tero.kristo@nokia.com> <1264182951-9205-2-git-send-email-tero.kristo@nokia.com> <1264182951-9205-3-git-send-email-tero.kristo@nokia.com> <1264182951-9205-4-git-send-email-tero.kristo@nokia.com> X-OriginalArrivalTime: 22 Jan 2010 16:05:09.0169 (UTC) FILETIME=[ABA8B210:01CA9B7C] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 1cfa5a6..4a81ef1 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -91,20 +91,6 @@ static int omap3_idle_bm_check(void) return 0; } -static int _cpuidle_allow_idle(struct powerdomain *pwrdm, - struct clockdomain *clkdm) -{ - omap2_clkdm_allow_idle(clkdm); - return 0; -} - -static int _cpuidle_deny_idle(struct powerdomain *pwrdm, - struct clockdomain *clkdm) -{ - omap2_clkdm_deny_idle(clkdm); - return 0; -} - /** * omap3_enter_idle - Programs OMAP3 to enter the specified state * @dev: cpuidle device @@ -141,19 +127,9 @@ static int omap3_enter_idle(struct cpuidle_device *dev, if (omap_irq_pending() || need_resched()) goto return_sleep_time; - if (cx->type == OMAP3_STATE_C1) { - pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle); - pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); - } - /* Execute ARM wfi */ omap_sram_idle(); - if (cx->type == OMAP3_STATE_C1) { - pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); - pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle); - } - return_sleep_time: getnstimeofday(&ts_postidle); ts_idle = timespec_sub(ts_postidle, ts_preidle); @@ -246,8 +222,8 @@ void omap_init_power_states(void) cpuidle_params_table[OMAP3_STATE_C2].wake_latency; omap3_power_states[OMAP3_STATE_C2].threshold = cpuidle_params_table[OMAP3_STATE_C2].threshold; - omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_ON; - omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_ON; + omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_INACTIVE; + omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_INACTIVE; omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID; /* C3 . MPU CSWR + Core inactive */ @@ -261,7 +237,7 @@ void omap_init_power_states(void) omap3_power_states[OMAP3_STATE_C3].threshold = cpuidle_params_table[OMAP3_STATE_C3].threshold; omap3_power_states[OMAP3_STATE_C3].mpu_state = PWRDM_POWER_RET; - omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_ON; + omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_INACTIVE; omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_CHECK_BM; @@ -276,7 +252,7 @@ void omap_init_power_states(void) omap3_power_states[OMAP3_STATE_C4].threshold = cpuidle_params_table[OMAP3_STATE_C4].threshold; omap3_power_states[OMAP3_STATE_C4].mpu_state = PWRDM_POWER_OFF; - omap3_power_states[OMAP3_STATE_C4].core_state = PWRDM_POWER_ON; + omap3_power_states[OMAP3_STATE_C4].core_state = PWRDM_POWER_INACTIVE; omap3_power_states[OMAP3_STATE_C4].flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_CHECK_BM;