From patchwork Thu Jan 28 15:16:44 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sanjeev Premi X-Patchwork-Id: 75590 X-Patchwork-Delegate: paul@pwsan.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o0SFGpvK032056 for ; Thu, 28 Jan 2010 15:16:51 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755328Ab0A1PQt (ORCPT ); Thu, 28 Jan 2010 10:16:49 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755388Ab0A1PQt (ORCPT ); Thu, 28 Jan 2010 10:16:49 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:59349 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755036Ab0A1PQt (ORCPT ); Thu, 28 Jan 2010 10:16:49 -0500 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id o0SFGj5R027943 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 28 Jan 2010 09:16:48 -0600 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id o0SFGim5011632; Thu, 28 Jan 2010 20:46:45 +0530 (IST) From: Sanjeev Premi To: linux-omap@vger.kernel.org Cc: Sanjeev Premi Subject: [PATCHv2] omap3: Check return values for clk_get() Date: Thu, 28 Jan 2010 20:46:44 +0530 Message-Id: <1264691804-29427-1-git-send-email-premi@ti.com> X-Mailer: git-send-email 1.6.2.2 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 28 Jan 2010 15:16:51 +0000 (UTC) diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 1f1b5a6..ad09f04 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -184,6 +185,7 @@ static int __init omap3xxx_clk_arch_init(void) { struct clk *osc_sys_ck, *dpll1_ck, *arm_fck, *core_ck; unsigned long osc_sys_rate; + bool err = 0 ; if (!cpu_is_omap34xx()) return 0; @@ -193,9 +195,23 @@ static int __init omap3xxx_clk_arch_init(void) /* XXX test these for success */ dpll1_ck = clk_get(NULL, "dpll1_ck"); + if (WARN(IS_ERR(dpll1_ck), "Failed to get dpll1_ck.\n")) + err = 1; + arm_fck = clk_get(NULL, "arm_fck"); + if (WARN(IS_ERR(arm_fck), "Failed to get arm_fck.\n")) + err = 1; + core_ck = clk_get(NULL, "core_ck"); + if (WARN(IS_ERR(core_ck), "Failed to get core_ck.\n")) + err = 1; + osc_sys_ck = clk_get(NULL, "osc_sys_ck"); + if (WARN(IS_ERR(osc_sys_ck), "Failed to get osc_sys_ck.\n")) + err = 1; + + if (err) + return -ENOENT; /* REVISIT: not yet ready for 343x */ if (clk_set_rate(dpll1_ck, mpurate))