| Message ID | 1265293547-18960-3-git-send-email-santosh.shilimkar@ti.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Delegated to: | Tony Lindgren |
| Headers | show |
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 38153e5..2d0733a 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -73,6 +73,8 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * the AuxCoreBoot1 register is updated with cpu state * A barrier is added to ensure that write buffer is drained */ + flush_cache_all(); + outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); omap_modify_auxcoreboot0(0x200, 0x0); flush_cache_all(); smp_wmb();