@@ -444,7 +444,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
omap_uart_smart_idle_enable(uart, 0);
if (cpu_is_omap34xx()) {
- u32 mod = (uart->num == 2) ? OMAP3430_PER_MOD : CORE_MOD;
+ u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
u32 wk_mask = 0;
u32 padconf = 0;
@@ -463,6 +463,10 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
wk_mask = OMAP3430_ST_UART3_MASK;
padconf = 0x19e;
break;
+ case 3:
+ wk_mask = OMAP3630_ST_UART4_MASK;
+ padconf = 0x0d2;
+ break;
}
uart->wk_mask = wk_mask;
uart->padconf = padconf;
@@ -694,6 +698,9 @@ void __init omap_serial_early_init(void)
if (cpu_is_omap44xx())
p->irq += 32;
+
+ if (cpu_is_omap3630() && (i == 3))
+ p->irq = INT_36XX_UART4_IRQ;
}
}
@@ -358,6 +358,8 @@
#define INT_35XX_CCDC_VD1_IRQ 92
#define INT_35XX_CCDC_VD2_IRQ 93
+#define INT_36XX_UART4_IRQ 80
+
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
* 16 MPUIO lines */
#define OMAP_MAX_GPIO_LINES 192