From patchwork Thu Apr 8 23:16:05 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: omar ramirez X-Patchwork-Id: 91539 X-Patchwork-Delegate: omar.ramirez@ti.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o38Mxo5U010162 for ; Thu, 8 Apr 2010 22:59:57 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933825Ab0DHW7r (ORCPT ); Thu, 8 Apr 2010 18:59:47 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:41604 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933811Ab0DHW7c (ORCPT ); Thu, 8 Apr 2010 18:59:32 -0400 Received: from dlep34.itg.ti.com ([157.170.170.115]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id o38MxPbj020438 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 8 Apr 2010 17:59:26 -0500 Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep34.itg.ti.com (8.13.7/8.13.7) with ESMTP id o38MxPKA009902; Thu, 8 Apr 2010 17:59:25 -0500 (CDT) Received: from Matrix (matrix.am.dhcp.ti.com [128.247.75.166]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id o38MxPZ16551; Thu, 8 Apr 2010 17:59:25 -0500 (CDT) Received: by Matrix (Postfix, from userid 1003) id 7EDAE41017B; Thu, 8 Apr 2010 18:16:09 -0500 (CDT) From: Omar Ramirez Luna To: linux-omap@vger.kernel.org Cc: Paul Walmsley , Hiroshi DOYU , Felipe Contreras , Ameya Palande , Guzman Lugo Fernando , Nishanth Menon , Omar Ramirez Luna Subject: [PATCH 16/19] DSPBRIDGE: Move MCBSP_CLOCKS code to a common place Date: Thu, 8 Apr 2010 18:16:05 -0500 Message-Id: <1270768568-10712-17-git-send-email-omar.ramirez@ti.com> X-Mailer: git-send-email 1.5.4.3 In-Reply-To: <1270768568-10712-16-git-send-email-omar.ramirez@ti.com> References: <1270768568-10712-1-git-send-email-omar.ramirez@ti.com> <1270768568-10712-2-git-send-email-omar.ramirez@ti.com> <1270768568-10712-3-git-send-email-omar.ramirez@ti.com> <1270768568-10712-4-git-send-email-omar.ramirez@ti.com> <1270768568-10712-5-git-send-email-omar.ramirez@ti.com> <1270768568-10712-6-git-send-email-omar.ramirez@ti.com> <1270768568-10712-7-git-send-email-omar.ramirez@ti.com> <1270768568-10712-8-git-send-email-omar.ramirez@ti.com> <1270768568-10712-9-git-send-email-omar.ramirez@ti.com> <1270768568-10712-10-git-send-email-omar.ramirez@ti.com> <1270768568-10712-11-git-send-email-omar.ramirez@ti.com> <1270768568-10712-12-git-send-email-omar.ramirez@ti.com> <1270768568-10712-13-git-send-email-omar.ramirez@ti.com> <1270768568-10712-14-git-send-email-omar.ramirez@ti.com> <1270768568-10712-15-git-send-email-omar.ramirez@ti.com> <1270768568-10712-16-git-send-email-omar.ramirez@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 08 Apr 2010 22:59:58 +0000 (UTC) diff --git a/drivers/dsp/bridge/services/clk.c b/drivers/dsp/bridge/services/clk.c index aa706ce..711bae4 100644 --- a/drivers/dsp/bridge/services/clk.c +++ b/drivers/dsp/bridge/services/clk.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include /* ----------------------------------- Trace & Debug */ #include @@ -134,6 +136,42 @@ static void ssi_clk_prepare(bool FLAG) iounmap(ssi_base); } +static void mcbsp_clk_prepare(bool flag, u8 id) +{ + struct cfg_hostres resources; + u32 value; + + cfg_get_host_resources((struct cfg_devnode *) + drv_get_first_dev_extension(), &resources); + + if (flag) { + if (id == DSP_CLK_MCBSP1) { + /* set MCBSP1_CLKS, on McBSP1 ON */ + value = __raw_readl(resources.dw_sys_ctrl_base + 0x274); + value |= 1 << 2; + __raw_writel(value, resources.dw_sys_ctrl_base + + 0x274); + } else if (id == DSP_CLK_MCBSP2) { + /* set MCBSP2_CLKS, on McBSP2 ON */ + value = __raw_readl(resources.dw_sys_ctrl_base + 0x274); + value |= 1 << 6; + __raw_writel(value, resources.dw_sys_ctrl_base + 0x274); + } + } else { + if (id == DSP_CLK_MCBSP1) { + /* clear MCBSP1_CLKS, on McBSP1 OFF */ + value = __raw_readl(resources.dw_sys_ctrl_base + 0x274); + value &= ~(1 << 2); + __raw_writel(value, resources.dw_sys_ctrl_base + 0x274); + } else if (id == DSP_CLK_MCBSP2) { + /* clear MCBSP2_CLKS, on McBSP2 OFF */ + value = __raw_readl(resources.dw_sys_ctrl_base + 0x274); + value &= ~(1 << 6); + __raw_writel(value, resources.dw_sys_ctrl_base + 0x274); + } + } +} + /* * ======== dsp_clk_enable ======== * Purpose: @@ -149,6 +187,7 @@ dsp_status dsp_clk_enable(IN enum dsp_clk_id clk_id) timer[clk_id] = omap_dm_timer_request_specific(DMT_ID(clk_id)); break; case MCBSP_CLK: + mcbsp_clk_prepare(true, clk_id); omap_mcbsp_set_io_type(MCBSP_ID(clk_id), OMAP_MCBSP_POLL_IO); omap_mcbsp_request(MCBSP_ID(clk_id)); break; @@ -193,6 +232,7 @@ dsp_status dsp_clk_disable(IN enum dsp_clk_id clk_id) omap_dm_timer_free(timer[clk_id]); break; case MCBSP_CLK: + mcbsp_clk_prepare(false, clk_id); omap_mcbsp_free(MCBSP_ID(clk_id)); break; case WDT_CLK: diff --git a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c index 5c518d0..a6e8e57 100644 --- a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c +++ b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c @@ -300,20 +300,11 @@ dsp_status dsp_peripheral_clk_ctrl(struct wmd_dev_context *dev_context, u32 tmp_index; u32 dsp_per_clks_before; dsp_status status = DSP_SOK; - struct cfg_hostres resources; - u32 value; dsp_per_clks_before = dev_context->dsp_per_clks; ext_clk = (u32) *((u32 *) pargs); - status = cfg_get_host_resources((struct cfg_devnode *) - drv_get_first_dev_extension(), - &resources); - - if (DSP_FAILED(status)) - return DSP_EFAIL; - ext_clk_id = ext_clk & MBX_PM_CLK_IDMASK; /* process the power message -- TODO, keep it in a separate function */ @@ -333,17 +324,6 @@ dsp_status dsp_peripheral_clk_ctrl(struct wmd_dev_context *dev_context, ext_clk_cmd = (ext_clk >> MBX_PM_CLK_CMDSHIFT) & MBX_PM_CLK_CMDMASK; switch (ext_clk_cmd) { case BPWR_DISABLE_CLOCK: - if (bpwr_clkid[clk_id_index] == BPWR_MCBSP1) { - /* clear MCBSP1_CLKS, on McBSP1 OFF */ - value = __raw_readl(resources.dw_sys_ctrl_base + 0x274); - value &= ~(1 << 2); - __raw_writel(value, resources.dw_sys_ctrl_base + 0x274); - } else if (bpwr_clkid[clk_id_index] == BPWR_MCBSP2) { - /* clear MCBSP2_CLKS, on McBSP2 OFF */ - value = __raw_readl(resources.dw_sys_ctrl_base + 0x274); - value &= ~(1 << 6); - __raw_writel(value, resources.dw_sys_ctrl_base + 0x274); - } status = dsp_clk_disable(bpwr_clks[clk_id_index].clk); dsp_clk_wakeup_event_ctrl(bpwr_clks[clk_id_index].clk_id, false); @@ -354,17 +334,6 @@ dsp_status dsp_peripheral_clk_ctrl(struct wmd_dev_context *dev_context, break; case BPWR_ENABLE_CLOCK: status = dsp_clk_enable(bpwr_clks[clk_id_index].clk); - if (bpwr_clkid[clk_id_index] == BPWR_MCBSP1) { - /* set MCBSP1_CLKS, on McBSP1 ON */ - value = __raw_readl(resources.dw_sys_ctrl_base + 0x274); - value |= 1 << 2; - __raw_writel(value, resources.dw_sys_ctrl_base + 0x274); - } else if (bpwr_clkid[clk_id_index] == BPWR_MCBSP2) { - /* set MCBSP2_CLKS, on McBSP2 ON */ - value = __raw_readl(resources.dw_sys_ctrl_base + 0x274); - value |= 1 << 6; - __raw_writel(value, resources.dw_sys_ctrl_base + 0x274); - } dsp_clk_wakeup_event_ctrl(bpwr_clks[clk_id_index].clk_id, true); if (DSP_SUCCEEDED(status)) (dev_context->dsp_per_clks) |= (1 << clk_id_index); @@ -462,31 +431,9 @@ dsp_status dsp_peripheral_clocks_disable(struct wmd_dev_context *dev_context, { u32 clk_idx; dsp_status status = DSP_SOK; - struct cfg_hostres resources; - u32 value; - - status = cfg_get_host_resources((struct cfg_devnode *) - drv_get_first_dev_extension(), - &resources); for (clk_idx = 0; clk_idx < MBX_PM_MAX_RESOURCES; clk_idx++) { if (((dev_context->dsp_per_clks) >> clk_idx) & 0x01) { - if (bpwr_clkid[clk_idx] == BPWR_MCBSP1) { - /* clear MCBSP1_CLKS, on McBSP1 OFF */ - value = __raw_readl(resources.dw_sys_ctrl_base - + 0x274); - value &= ~(1 << 2); - __raw_writel(value, resources.dw_sys_ctrl_base - + 0x274); - } else if (bpwr_clkid[clk_idx] == BPWR_MCBSP2) { - /* clear MCBSP2_CLKS, on McBSP2 OFF */ - value = __raw_readl(resources.dw_sys_ctrl_base - + 0x274); - value &= ~(1 << 6); - __raw_writel(value, resources.dw_sys_ctrl_base - + 0x274); - } - /* Disables the clocks of the peripheral */ status = dsp_clk_disable(bpwr_clks[clk_idx].clk); } @@ -503,31 +450,11 @@ dsp_status dsp_peripheral_clocks_enable(struct wmd_dev_context *dev_context, { u32 clk_idx; dsp_status clk_status = DSP_EFAIL; - struct cfg_hostres resources; - u32 value; - - cfg_get_host_resources((struct cfg_devnode *) - drv_get_first_dev_extension(), &resources); for (clk_idx = 0; clk_idx < MBX_PM_MAX_RESOURCES; clk_idx++) { if (((dev_context->dsp_per_clks) >> clk_idx) & 0x01) { /* Enable the clocks of the peripheral */ clk_status = dsp_clk_enable(bpwr_clks[clk_idx].clk); - if (bpwr_clkid[clk_idx] == BPWR_MCBSP1) { - /* set MCBSP1_CLKS, on McBSP1 ON */ - value = __raw_readl(resources.dw_sys_ctrl_base - + 0x274); - value |= 1 << 2; - __raw_writel(value, resources.dw_sys_ctrl_base - + 0x274); - } else if (bpwr_clkid[clk_idx] == BPWR_MCBSP2) { - /* set MCBSP2_CLKS, on McBSP2 ON */ - value = __raw_readl(resources.dw_sys_ctrl_base - + 0x274); - value |= 1 << 6; - __raw_writel(value, resources.dw_sys_ctrl_base - + 0x274); - } } } return clk_status;