From patchwork Mon Jun 28 12:16:31 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kalliguddi, Hema" X-Patchwork-Id: 108370 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o5SCGr1J013645 for ; Mon, 28 Jun 2010 12:16:53 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753800Ab0F1MQi (ORCPT ); Mon, 28 Jun 2010 08:16:38 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:47728 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753787Ab0F1MQh (ORCPT ); Mon, 28 Jun 2010 08:16:37 -0400 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o5SCGWUX015178 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 28 Jun 2010 07:16:35 -0500 Received: from linfarm488.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id o5SCGVFD006804; Mon, 28 Jun 2010 17:46:31 +0530 (IST) Received: from linfarm488.india.ti.com (localhost [127.0.0.1]) by linfarm488.india.ti.com (8.12.11/8.12.11) with ESMTP id o5SCGV9P006135; Mon, 28 Jun 2010 17:46:31 +0530 Received: (from a0876481@localhost) by linfarm488.india.ti.com (8.12.11/8.12.11/Submit) id o5SCGVjv006133; Mon, 28 Jun 2010 17:46:31 +0530 From: Hema HK To: linux-omap@vger.kernel.org, linux-usb@vger.kernel.org Cc: Hema HK , Felipe Balbi , tony@atomide.com Subject: [PATCH 3/4]usb: musb: HWMOD database structures addition for OMAP3 Date: Mon, 28 Jun 2010 17:46:31 +0530 Message-Id: <1277727391-6041-1-git-send-email-hemahk@ti.com> X-Mailer: git-send-email 1.5.6.6 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Mon, 28 Jun 2010 12:16:53 +0000 (UTC) Index: linux-omap-pm/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c =================================================================== --- linux-omap-pm.orig/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ linux-omap-pm/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -82,6 +82,15 @@ static struct omap_hwmod omap3xxx_l3_mai }; static struct omap_hwmod omap3xxx_l4_wkup_hwmod; +static struct omap_hwmod omap3xxx_usbhsotg_hwmod; + + /* L3 <- USBHSOTG interface */ +static struct omap_hwmod_ocp_if omap3xxx_usbhsotg__l3 = { + .master = &omap3xxx_usbhsotg_hwmod, + .slave = &omap3xxx_l3_main_hwmod, + .clk = "core_l3_ick", + .user = OCP_USER_MPU, +}; /* L4_CORE -> L4_WKUP interface */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { @@ -90,6 +99,37 @@ static struct omap_hwmod_ocp_if omap3xxx .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* +* USBHSOTG interface data +*/ + +static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = { + { + .pa_start = OMAP34XX_HSUSB_OTG_BASE, + .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1, + .flags = ADDR_TYPE_RT + }, +}; + +/* USBHSOTG <- L4_CORE interface */ +static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap3xxx_usbhsotg_hwmod, + .clk = "l4_ick", + .addr = omap3xxx_usbhsotg_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs), + .user = OCP_USER_MPU, + +}; + +static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_masters[] = { + &omap3xxx_usbhsotg__l3, +}; + +static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_slaves[] = { + &omap3xxx_l4_core__usbhsotg, +}; + /* Slave interfaces on the L4_CORE interconnect */ static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = { &omap3xxx_l3_main__l4_core, @@ -197,6 +237,56 @@ static struct omap_hwmod omap3xxx_iva_hw .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; +/* + * USBHSOTG (USBHS) + */ +static struct omap_hwmod_class_sysconfig omap3xxx_usbhsotg_sysc = { + .rev_offs = 0x0400, + .sysc_offs = 0x0404, + .syss_offs = 0x0408, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class usbotg_class = { + .name = "usbotg", + .sysc = &omap3xxx_usbhsotg_sysc, +}; + +/* usb_otg_hs */ +static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = { + + { .name = "mc", .irq = 92 }, + { .name = "dma", .irq = 93 }, + +}; + +static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { + .name = "usb_otg_hs", + .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs), + .main_clk = "hsotgusb_ick", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP3430_GRPSEL_HSOTGUSB_MASK, + .module_offs = CORE_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT, + .idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT + }, + }, + .masters = omap3xxx_usbhsotg_masters, + .masters_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_masters), + .slaves = omap3xxx_usbhsotg_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_slaves), + .class = &usbotg_class, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) +}; + static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_l3_main_hwmod, &omap3xxx_l4_core_hwmod, @@ -204,6 +294,7 @@ static __initdata struct omap_hwmod *oma &omap3xxx_l4_wkup_hwmod, &omap3xxx_mpu_hwmod, &omap3xxx_iva_hwmod, + &omap3xxx_usbhsotg_hwmod, NULL, };