From patchwork Wed Aug 4 22:12:46 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Cousson X-Patchwork-Id: 117159 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o74MCvL2010074 for ; Wed, 4 Aug 2010 22:12:59 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756404Ab0HDWM6 (ORCPT ); Wed, 4 Aug 2010 18:12:58 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:45450 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752047Ab0HDWM5 (ORCPT ); Wed, 4 Aug 2010 18:12:57 -0400 Received: from dlep36.itg.ti.com ([157.170.170.91]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id o74MCuWg020297 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 4 Aug 2010 17:12:56 -0500 Received: from localhost.localdomain (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id o74MCmkq001940; Wed, 4 Aug 2010 17:12:51 -0500 (CDT) From: Benoit Cousson To: linux-omap@vger.kernel.org, khilman@deeprootsystems.com, paul@pwsan.com Cc: rnayak@ti.com, santosh.shilimkar@ti.com, Benoit Cousson Subject: [PATCH 1/3] OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRM Date: Thu, 5 Aug 2010 00:12:46 +0200 Message-Id: <1280959968-23933-2-git-send-email-b-cousson@ti.com> X-Mailer: git-send-email 1.6.1.3 In-Reply-To: <1280959968-23933-1-git-send-email-b-cousson@ti.com> References: <1280959968-23933-1-git-send-email-b-cousson@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 04 Aug 2010 22:12:59 +0000 (UTC) diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 96f4616..d4388d3 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -216,6 +216,30 @@ u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) return v; } +/* Read a PRM register, AND it, and shift the result down to bit 0 */ +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) +{ + u32 v; + + v = __raw_readl(reg); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) +{ + u32 v; + + v = __raw_readl(reg); + v &= ~mask; + v |= bits; + __raw_writel(v, reg); + + return v; +} /* Read a register in a CM module */ u32 cm_read_mod_reg(s16 module, u16 idx) { diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h index 9fbd914..ab77442 100644 --- a/arch/arm/plat-omap/include/plat/prcm.h +++ b/arch/arm/plat-omap/include/plat/prcm.h @@ -38,6 +38,8 @@ u32 prm_read_mod_reg(s16 module, u16 idx); void prm_write_mod_reg(u32 val, s16 module, u16 idx); u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg); u32 cm_read_mod_reg(s16 module, u16 idx); void cm_write_mod_reg(u32 val, s16 module, u16 idx); u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);