From patchwork Tue Sep 21 08:51:28 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tarun Kanti DebBarma X-Patchwork-Id: 195772 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8KLoGul009839 for ; Mon, 20 Sep 2010 21:50:37 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757827Ab0ITVug (ORCPT ); Mon, 20 Sep 2010 17:50:36 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:48298 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757269Ab0ITVug (ORCPT ); Mon, 20 Sep 2010 17:50:36 -0400 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id o8KLoU7s000362 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 20 Sep 2010 16:50:33 -0500 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id o8KLoShL017800; Tue, 21 Sep 2010 03:20:28 +0530 (IST) From: Tarun Kanti DebBarma To: linux-omap@vger.kernel.org Cc: Tarun Kanti DebBarma , Partha Basak , Thara Gopinath , "Cousson, Benoit" , Paul Walmsley , Kevin Hilman , Tony Lindgren Subject: [PATCHv3 2/17] dmtimer: infrastructure to support hwmod Date: Tue, 21 Sep 2010 14:21:28 +0530 Message-Id: <1285059089-26341-1-git-send-email-tarun.kanti@ti.com> X-Mailer: git-send-email 1.6.0.4 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 20 Sep 2010 21:50:37 +0000 (UTC) diff --git a/arch/arm/mach-omap2/dmtimer.h b/arch/arm/mach-omap2/dmtimer.h new file mode 100644 index 0000000..3355725 --- /dev/null +++ b/arch/arm/mach-omap2/dmtimer.h @@ -0,0 +1,25 @@ +/** + * linux/arch/arm/mach-omap2/dmtimer.h + * + * Copyright (C) 2010 Texas Instruments, Inc. + * Thara Gopinath + * Tarun Kanti DebBarma + * + * OMAP2 Dual-Mode Timers + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_DMTIMER_H +#define __ASM_ARCH_DMTIMER_H + +/* + * dmtimer is required during early part of boot sequence even before + * device model and pm_runtime if fully up and running. this function + * provides hook to omap2_init_common_hw() which is triggered from + * start_kernel()->init_irq() of kernel initalization sequence. + */ +void __init omap2_dm_timer_early_init(void); + +#endif diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 44bafda..a7b1679 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -10,6 +10,12 @@ * Copyright (C) 2009 Texas Instruments * Added OMAP4 support - Santosh Shilimkar * + * Copyright (C) 2010 Texas Instruments, Inc. + * Thara Gopinath + * Tarun Kanti DebBarma + * - hwmod support + * - omap4 support + * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your @@ -151,6 +157,8 @@ (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) struct omap_dm_timer { + int id; + unsigned long fclk_rate; unsigned long phys_base; int irq; #ifdef CONFIG_ARCH_OMAP2PLUS @@ -160,6 +168,7 @@ struct omap_dm_timer { unsigned reserved:1; unsigned enabled:1; unsigned posted:1; + struct platform_device *pdev; }; static int dm_timer_count; diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 20f1054..3ec17c5 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -29,6 +29,8 @@ #ifndef __ASM_ARCH_DMTIMER_H #define __ASM_ARCH_DMTIMER_H +#include + /* clock sources */ #define OMAP_TIMER_SRC_SYS_CLK 0x00 #define OMAP_TIMER_SRC_32_KHZ 0x01 @@ -44,9 +46,49 @@ #define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 +/* timer ip constants */ +#define OMAP_TIMER_IP_VERSION_1 0x1 /* OMAP1/2/3 timers */ +#define OMAP_TIMER_IP_VERSION_2 0x2 /* OMAP4 timers */ + +/* + * number of clock sources supported in the current platform. + * for the time being keeping it to 6 just to accomodate future. + * expansion. currently, only upto a maximum of 3 clock sources + * supported on OMAP4. + */ +#define NR_CLK_SOURCES 3 + + +/** + * omap_timer_dev_attr - timer device attribute + * + * current implementation contains array of clock source names supported + * by different timers. for example, in the case of OMAP4, timer[5-8] + * supports different set of input clock sources as compared to the rest. + * these array of clock names are used during timer initialization to + * parse through timer list and obtain their corresponding struct clk*. + * this is subsequently used for changing the timer input clock sources + * by client drivers. + */ +struct omap_timer_dev_attr { + char **clk_names; + u32 *reg_map; +}; + struct omap_dm_timer; struct clk; +struct dmtimer_platform_data { + int (*set_timer_src) + (struct platform_device *pdev, int source); +#ifdef CONFIG_ARCH_OMAP2PLUS + struct clk *source_clocks[NR_CLK_SOURCES]; +#endif + u32 *reg_map; + int timer_ip_type; + bool is_early_init; +}; + int omap_dm_timer_init(void); struct omap_dm_timer *omap_dm_timer_request(void);