From patchwork Tue Sep 21 08:56:02 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tarun Kanti DebBarma X-Patchwork-Id: 195902 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8KLtBmD010559 for ; Mon, 20 Sep 2010 21:55:11 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932191Ab0ITVzK (ORCPT ); Mon, 20 Sep 2010 17:55:10 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:48524 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932187Ab0ITVzJ (ORCPT ); Mon, 20 Sep 2010 17:55:09 -0400 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id o8KLt4A2000876 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 20 Sep 2010 16:55:07 -0500 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id o8KLt2UY018006; Tue, 21 Sep 2010 03:25:02 +0530 (IST) From: Tarun Kanti DebBarma To: linux-omap@vger.kernel.org Cc: Tarun Kanti DebBarma , Partha Basak , Santosh Shilimkar , "Cousson, Benoit" , Paul Walmsley , Kevin Hilman , Tony Lindgren Subject: [PATCHv3 15/17] dmtimer: OMAP4 specific change in plat-omap Date: Tue, 21 Sep 2010 14:26:02 +0530 Message-Id: <1285059362-26668-1-git-send-email-tarun.kanti@ti.com> X-Mailer: git-send-email 1.6.0.4 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 20 Sep 2010 21:55:11 +0000 (UTC) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 9da527f..4f735d7 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -252,9 +252,19 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u8 reg, static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) { int c; + u32 reg; + int reset_is_active; + struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; + if (pdata->timer_ip_type == OMAP_TIMER_IP_VERSION_2) { + reg = OMAP_TIMER_OCP_CFG_REG; + reset_is_active = 1; + } else { + reg = OMAP_TIMER_SYS_STAT_REG; + reset_is_active = 0; + } c = 0; - while (!(omap_dm_timer_read_reg(timer, OMAP_TIMER_SYS_STAT_REG) & 1)) { + while (omap_dm_timer_read_reg(timer, reg) == reset_is_active) { c++; if (c > 100000) { printk(KERN_ERR "Timer failed to reset\n");