From patchwork Sat Oct 2 09:43:10 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 226481 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o929fZFx015187 for ; Sat, 2 Oct 2010 09:43:19 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753883Ab0JBJnT (ORCPT ); Sat, 2 Oct 2010 05:43:19 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:41856 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753850Ab0JBJnS (ORCPT ); Sat, 2 Oct 2010 05:43:18 -0400 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id o929hEMg007546 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sat, 2 Oct 2010 04:43:16 -0500 Received: from linfarm476.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id o929hBEb008501; Sat, 2 Oct 2010 15:13:12 +0530 (IST) Received: from linfarm476.india.ti.com (localhost [127.0.0.1]) by linfarm476.india.ti.com (8.12.11/8.12.11) with ESMTP id o929hBWY001098; Sat, 2 Oct 2010 15:13:11 +0530 Received: (from a0393909@localhost) by linfarm476.india.ti.com (8.12.11/8.12.11/Submit) id o929hAJw001093; Sat, 2 Oct 2010 15:13:10 +0530 From: Santosh Shilimkar To: linux-omap@vger.kernel.org Cc: Santosh Shilimkar , Rajendra Nayak , Kevin Hilman Subject: [PATCH] omap3: Restore the powerdomian states post wfi in omap_sram_idle Date: Sat, 2 Oct 2010 15:13:10 +0530 Message-Id: <1286012590-1013-1-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.5.6.6 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Sat, 02 Oct 2010 09:43:19 +0000 (UTC) diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 8ea012e..54a8c27 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -267,6 +267,17 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, } /* + * Program PER explicitly like core to avoid any unsupported + * PER/CORE combination which can lead to deadlock + */ + if (sleep_while_idle) { + if (enable_off_mode) + pwrdm_set_next_pwrst(per_pd, PWRDM_POWER_OFF); + else + pwrdm_set_next_pwrst(per_pd, PWRDM_POWER_RET); + } + + /* * Prevent PER off if CORE is not in retention or off as this * would disable PER wakeups completely. */ diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 570ce1d..ca5fb12 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -455,6 +455,23 @@ void omap_sram_idle(void) if (pwrdm_read_prev_pwrst(mpu_pwrdm) == PWRDM_POWER_OFF) restore_table_entry(); + /* + * Restore the mpu, neon per and core power domain + * states to ON otherwise power domain can transition + * to already programmed low power state while issuing WFI + * outside the idle thread when dependencies are met. + * On HS/EMU devices, mpu can do WFI as part of secure code + * execution like waiting on DMA interrupt or waiting for + * encryption to be done etc. + * This can result in undesired power domain transition + * if the power state control is not restored from + * previously programmed OFF/RET stated as part of cpuidle. + */ + pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); + pwrdm_set_next_pwrst(neon_pwrdm, PWRDM_POWER_ON); + pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON); + pwrdm_set_next_pwrst(per_pwrdm, PWRDM_POWER_ON); + /* CORE */ if (core_next_state < PWRDM_POWER_ON) { core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);