From patchwork Wed Oct 13 10:52:01 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: charu@ti.com X-Patchwork-Id: 250171 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o9DAqRMN018979 for ; Wed, 13 Oct 2010 10:52:27 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752134Ab0JMKw0 (ORCPT ); Wed, 13 Oct 2010 06:52:26 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:42239 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750937Ab0JMKwZ (ORCPT ); Wed, 13 Oct 2010 06:52:25 -0400 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o9DAq7qf031615 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 13 Oct 2010 05:52:09 -0500 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id o9DAq2pp019948; Wed, 13 Oct 2010 16:22:03 +0530 (IST) From: "Varadarajan, Charulatha" To: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: tony@atomide.com, linux@arm.linux.org.uk, Sourav Poddar , Charulatha V Subject: [PATCH] ARM: io: Fix namespace conflicts. Date: Wed, 13 Oct 2010 16:22:01 +0530 Message-Id: <1286967121-5888-1-git-send-email-charu@ti.com> X-Mailer: git-send-email 1.7.0.4 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 13 Oct 2010 10:52:28 +0000 (UTC) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 1261b1f..01e4a7b 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -131,11 +131,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr) #define outl(v,p) __raw_writel((__force __u32) \ cpu_to_le32(v),__io(p)) -#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; }) -#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \ - __raw_readw(__io(p))); __v; }) -#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \ - __raw_readl(__io(p))); __v; }) +#define inb(p) ({ __u8 __inbv = __raw_readb(__io(p)); __inbv; }) +#define inw(p) ({ __u16 __inwv = le16_to_cpu((__force __le16) \ + __raw_readw(__io(p))); __inwv; }) +#define inl(p) ({ __u32 __inlv = le32_to_cpu((__force __le32) \ + __raw_readl(__io(p))); __inlv; }) #define outsb(p,d,l) __raw_writesb(__io(p),d,l) #define outsw(p,d,l) __raw_writesw(__io(p),d,l) @@ -200,9 +200,12 @@ extern void _memset_io(volatile void __iomem *, int, size_t); #define __iowmb() do { } while (0) #endif -#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) -#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) -#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) +#define readb(c) ({ u8 __readbv = readb_relaxed(c); \ + __iormb(); __readbv; }) +#define readw(c) ({ u16 __readwv = readw_relaxed(c); \ + __iormb(); __readwv; }) +#define readl(c) ({ u32 __readlv = readl_relaxed(c);\ + __iormb(); __readlv; }) #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) @@ -258,9 +261,16 @@ extern void _memset_io(volatile void __iomem *, int, size_t); * io{read,write}{8,16,32} macros */ #ifndef ioread8 -#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; }) -#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; }) -#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; }) +#define ioread8(p) ({ unsigned int __ioread8v = __raw_readb(p); \ + __iormb(); __ioread8v; }) +#define ioread16(p) ({ unsigned int __ioread16v = \ + le16_to_cpu((__force __le16) \ + __raw_readw(p)); __iormb(); \ + __ioread16v; }) +#define ioread32(p) ({ unsigned int __ioread32v = \ + le32_to_cpu((__force __le32) \ + __raw_readl(p)); __iormb(); \ + __ioread32v; }) #define iowrite8(v,p) ({ __iowmb(); (void)__raw_writeb(v, p); }) #define iowrite16(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); })